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| author | Philippe Mathieu-Daudé | 2020-10-29 10:32:56 +0100 |
|---|---|---|
| committer | Stefan Hajnoczi | 2020-11-03 20:06:21 +0100 |
| commit | 52b75ea8ec4f6cd8028bd8406ebcf2e80ffc6e05 (patch) | |
| tree | f2ea28315570e7bacffb025ef0fe1706ae3a0474 /block | |
| parent | block/nvme: Correctly initialize Admin Queue Attributes (diff) | |
| download | qemu-52b75ea8ec4f6cd8028bd8406ebcf2e80ffc6e05.tar.gz qemu-52b75ea8ec4f6cd8028bd8406ebcf2e80ffc6e05.tar.xz qemu-52b75ea8ec4f6cd8028bd8406ebcf2e80ffc6e05.zip | |
block/nvme: Simplify ADMIN queue access
We don't need to dereference from BDRVNVMeState each time.
Use a NVMeQueuePair pointer on the admin queue.
The nvme_init() becomes easier to review, matching the style
of nvme_add_io_queue().
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20201029093306.1063879-16-philmd@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Diffstat (limited to 'block')
| -rw-r--r-- | block/nvme.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/block/nvme.c b/block/nvme.c index 0902aa5542..eed12f4933 100644 --- a/block/nvme.c +++ b/block/nvme.c @@ -700,6 +700,7 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, Error **errp) { BDRVNVMeState *s = bs->opaque; + NVMeQueuePair *q; AioContext *aio_context = bdrv_get_aio_context(bs); int ret; uint64_t cap; @@ -781,19 +782,18 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, /* Set up admin queue. */ s->queues = g_new(NVMeQueuePair *, 1); - s->queues[INDEX_ADMIN] = nvme_create_queue_pair(s, aio_context, 0, - NVME_QUEUE_SIZE, - errp); - if (!s->queues[INDEX_ADMIN]) { + q = nvme_create_queue_pair(s, aio_context, 0, NVME_QUEUE_SIZE, errp); + if (!q) { ret = -EINVAL; goto out; } + s->queues[INDEX_ADMIN] = q; s->queue_count = 1; QEMU_BUILD_BUG_ON((NVME_QUEUE_SIZE - 1) & 0xF000); regs->aqa = cpu_to_le32(((NVME_QUEUE_SIZE - 1) << AQA_ACQS_SHIFT) | ((NVME_QUEUE_SIZE - 1) << AQA_ASQS_SHIFT)); - regs->asq = cpu_to_le64(s->queues[INDEX_ADMIN]->sq.iova); - regs->acq = cpu_to_le64(s->queues[INDEX_ADMIN]->cq.iova); + regs->asq = cpu_to_le64(q->sq.iova); + regs->acq = cpu_to_le64(q->cq.iova); /* After setting up all control registers we can enable device now. */ regs->cc = cpu_to_le32((ctz32(NVME_CQ_ENTRY_BYTES) << CC_IOCQES_SHIFT) | |