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authorMax Filippov2017-03-07 02:17:43 +0100
committerMax Filippov2018-03-13 19:30:22 +0100
commit9fb40342d4b32152cedf32efe28b59ec3b932bd8 (patch)
treeb64f05eb2182fd569334de196445bac33c2973b4 /configure
parenttarget/xtensa: use correct number of registers in gdbstub (diff)
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target/xtensa: support MTTCG
- emit TCG barriers for MEMW, EXTW, S32RI and L32AI; - do atomic_cmpxchg_i32 for S32C1I. Cc: Emilio G. Cota <cota@braap.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'configure')
-rwxr-xr-xconfigure1
1 files changed, 1 insertions, 0 deletions
diff --git a/configure b/configure
index af72fc852e..c0cb9e6498 100755
--- a/configure
+++ b/configure
@@ -6840,6 +6840,7 @@ case "$target_name" in
;;
xtensa|xtensaeb)
TARGET_ARCH=xtensa
+ mttcg="yes"
;;
*)
error_exit "Unsupported target CPU"