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authorBin Meng2021-01-16 06:41:23 +0100
committerAlistair Francis2021-01-16 19:57:21 +0100
commit138ca49a82b978f035b709abee45324dd7ab3e68 (patch)
tree1cd39b097a0d5d422e6d8a771bbabf8b311f9b81 /default-configs/targets/riscv64-softmmu.mak
parenttarget/riscv: Generate the GDB XML file for CSR registers dynamically (diff)
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target/riscv: Remove built-in GDB XML files for CSRs
Now that we have switched to generate the RISC-V CSR XML dynamically, remove the built-in hardcoded XML files. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210116054123.5457-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'default-configs/targets/riscv64-softmmu.mak')
-rw-r--r--default-configs/targets/riscv64-softmmu.mak2
1 files changed, 1 insertions, 1 deletions
diff --git a/default-configs/targets/riscv64-softmmu.mak b/default-configs/targets/riscv64-softmmu.mak
index d809bd666a..7c0e7eeb42 100644
--- a/default-configs/targets/riscv64-softmmu.mak
+++ b/default-configs/targets/riscv64-softmmu.mak
@@ -1,5 +1,5 @@
TARGET_ARCH=riscv64
TARGET_BASE_ARCH=riscv
TARGET_SUPPORTS_MTTCG=y
-TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-csr.xml gdb-xml/riscv-64bit-virtual.xml
+TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml
TARGET_NEED_FDT=y