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author | Julian Brown | 2017-02-07 19:29:59 +0100 |
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committer | Peter Maydell | 2017-02-07 19:29:59 +0100 |
commit | f7478a92dd9ee2276bfaa5b7317140d3f9d6a53b (patch) | |
tree | f533aa39ca2f33bb53b6135f93f2072069ad9fae /disas.c | |
parent | target/arm: Add cfgend parameter for ARM CPU selection. (diff) | |
download | qemu-f7478a92dd9ee2276bfaa5b7317140d3f9d6a53b.tar.gz qemu-f7478a92dd9ee2276bfaa5b7317140d3f9d6a53b.tar.xz qemu-f7478a92dd9ee2276bfaa5b7317140d3f9d6a53b.zip |
Fix Thumb-1 BE32 execution and disassembly.
Thumb-1 code has some issues in BE32 mode (as currently implemented). In
short, since bytes are swapped within words at load time for BE32
executables, this also swaps pairs of adjacent Thumb-1 instructions.
This patch un-swaps those pairs of instructions again, both for execution,
and for disassembly. (The previous version of the patch always read four
bytes in arm_read_memory_func and then extracted the proper two bytes,
in a probably misguided attempt to match the behaviour of actual hardware
as described by e.g. the ARM9TDMI TRM, section 3.3 "Endian effects for
instruction fetches". It's less complicated to just read the correct
two bytes though.)
Signed-off-by: Julian Brown <julian@codesourcery.com>
Message-id: ca20462a044848000370318a8bd41dd0a4ed273f.1484929304.git.julian@codesourcery.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'disas.c')
-rw-r--r-- | disas.c | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -190,6 +190,7 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, s.cpu = cpu; s.info.read_memory_func = target_read_memory; + s.info.read_memory_inner_func = NULL; s.info.buffer_vma = code; s.info.buffer_length = size; s.info.print_address_func = generic_print_address; |