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authorPeter Maydell2014-10-24 13:40:28 +0200
committerPeter Maydell2014-10-24 13:40:29 +0200
commit71b7f54fdfa6a9bd56546b5c3996311b7b836636 (patch)
treebaddcc6aa7092b7dc6d01f97d244d0a4f9f20aae /disas/libvixl/code-buffer.h
parentMerge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (diff)
parenttarget-arm: A32: Emulate the SMC instruction (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20141024' into staging
target-arm queue: * remove pointless 'info pcmcia' and a lot of now-dead code * register ARM cpu reset handlers even if not using -kernel * update to libvixl 1.6 * various minor code cleanups * support PSCI under TCG ('virt' machine can now be shut down, SMP configurations work) * correct the sense of the AArch64 DCZID DZP bit * report a valid L1Ip field in CTR_EL0 for CPU type "any" * correctly UNDEF writes to FPINST/FPINST2 from EL0 * more preparatory code refactoring for EL2/EL3 support # gpg: Signature made Fri 24 Oct 2014 12:35:52 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20141024: (23 commits) target-arm: A32: Emulate the SMC instruction target-arm: make arm_current_el() return EL3 target-arm: rename arm_current_pl to arm_current_el target-arm: reject switching to monitor mode target-arm: add arm_is_secure() function target-arm: increase arrays of registers R13 & R14 target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0 target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" target-arm: Correct sense of the DCZID DZP bit arm/virt: enable PSCI emulation support for system emulation target-arm: add emulation of PSCI calls for system emulation target-arm: Add support for A32 and T32 HVC and SMC insns target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers target-arm: add missing PSCI constants needed for PSCI emulation target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes target-arm: add powered off cpu state omap_gpmc.c: Remove duplicate assignment disas/libvixl/a64/instructions-a64.h: Remove unused constants arm_gic: remove unused parameter. disas/libvixl: Update to libvixl 1.6 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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+// Copyright 2014, ARM Limited
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// * Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+// * Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+// * Neither the name of ARM Limited nor the names of its contributors may be
+// used to endorse or promote products derived from this software without
+// specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
+// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#ifndef VIXL_CODE_BUFFER_H
+#define VIXL_CODE_BUFFER_H
+
+#include <string.h>
+#include "globals.h"
+
+namespace vixl {
+
+class CodeBuffer {
+ public:
+ explicit CodeBuffer(size_t capacity = 4 * KBytes);
+ CodeBuffer(void* buffer, size_t capacity);
+ ~CodeBuffer();
+
+ void Reset();
+
+ ptrdiff_t OffsetFrom(ptrdiff_t offset) const {
+ ptrdiff_t cursor_offset = cursor_ - buffer_;
+ VIXL_ASSERT((offset >= 0) && (offset <= cursor_offset));
+ return cursor_offset - offset;
+ }
+
+ ptrdiff_t CursorOffset() const {
+ return OffsetFrom(0);
+ }
+
+ template <typename T>
+ T GetOffsetAddress(ptrdiff_t offset) const {
+ VIXL_ASSERT((offset >= 0) && (offset <= (cursor_ - buffer_)));
+ return reinterpret_cast<T>(buffer_ + offset);
+ }
+
+ size_t RemainingBytes() const {
+ VIXL_ASSERT((cursor_ >= buffer_) && (cursor_ <= (buffer_ + capacity_)));
+ return (buffer_ + capacity_) - cursor_;
+ }
+
+ // A code buffer can emit:
+ // * 32-bit data: instruction and constant.
+ // * 64-bit data: constant.
+ // * string: debug info.
+ void Emit32(uint32_t data) { Emit(data); }
+
+ void Emit64(uint64_t data) { Emit(data); }
+
+ void EmitString(const char* string);
+
+ // Align to kInstructionSize.
+ void Align();
+
+ size_t capacity() const { return capacity_; }
+
+ bool IsManaged() const { return managed_; }
+
+ void Grow(size_t new_capacity);
+
+ bool IsDirty() const { return dirty_; }
+
+ void SetClean() { dirty_ = false; }
+
+ private:
+ template <typename T>
+ void Emit(T value) {
+ VIXL_ASSERT(RemainingBytes() >= sizeof(value));
+ dirty_ = true;
+ memcpy(cursor_, &value, sizeof(value));
+ cursor_ += sizeof(value);
+ }
+
+ // Backing store of the buffer.
+ byte* buffer_;
+ // If true the backing store is allocated and deallocated by the buffer. The
+ // backing store can then grow on demand. If false the backing store is
+ // provided by the user and cannot be resized internally.
+ bool managed_;
+ // Pointer to the next location to be written.
+ byte* cursor_;
+ // True if there has been any write since the buffer was created or cleaned.
+ bool dirty_;
+ // Capacity in bytes of the backing store.
+ size_t capacity_;
+};
+
+} // namespace vixl
+
+#endif // VIXL_CODE_BUFFER_H
+