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| author | Matthieu Bucchianeri | 2020-07-27 19:55:53 +0200 |
|---|---|---|
| committer | David Gibson | 2020-08-12 05:16:27 +0200 |
| commit | 8dcdb535d7cc4ba6270bb756e12e1d323254ed4e (patch) | |
| tree | 54fc8837dc3450a06dd7007e60c57d8c1c09dffd /docs/specs/conf.py | |
| parent | target/ppc: add vmulh{su}d instructions (diff) | |
| download | qemu-8dcdb535d7cc4ba6270bb756e12e1d323254ed4e.tar.gz qemu-8dcdb535d7cc4ba6270bb756e12e1d323254ed4e.tar.xz qemu-8dcdb535d7cc4ba6270bb756e12e1d323254ed4e.zip | |
target/ppc: Fix SPE unavailable exception triggering
When emulating certain floating point instructions or vector instructions on
PowerPC machines, QEMU did not properly generate the SPE/Embedded Floating-
Point Unavailable interrupt. See the buglink further below for references to
the relevant NXP documentation.
This patch fixes the behavior of some evfs* instructions that were
incorrectly emitting the interrupt.
More importantly, this patch fixes the behavior of several efd* and ev*
instructions that were not generating the interrupt. Triggering the
interrupt for these instructions fixes lazy FPU/vector context switching on
some operating systems like Linux.
Without this patch, the result of some double-precision arithmetic could be
corrupted due to the lack of proper saving and restoring of the upper
32-bit part of the general-purpose registers.
Buglink: https://bugs.launchpad.net/qemu/+bug/1888918
Buglink: https://bugs.launchpad.net/qemu/+bug/1611394
Signed-off-by: Matthieu Bucchianeri <matthieu.bucchianeri@leostella.com>
Message-Id: <20200727175553.32276-1-matthieu.bucchianeri@leostella.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'docs/specs/conf.py')
0 files changed, 0 insertions, 0 deletions