summaryrefslogtreecommitdiffstats
path: root/docs/system/arm
diff options
context:
space:
mode:
authorRichard Henderson2022-07-11 18:32:09 +0200
committerRichard Henderson2022-07-11 18:32:09 +0200
commit9fed1bca6bc643ce91b6117f4974421aaede4751 (patch)
tree41ac4e6c9e822fb36a4be1aad6b5855bf0237eb7 /docs/system/arm
parentMerge tag 'pull-target-arm-20220707' of https://git.linaro.org/people/pmaydel... (diff)
parentlinux-user/aarch64: Add SME related hwcap entries (diff)
downloadqemu-9fed1bca6bc643ce91b6117f4974421aaede4751.tar.gz
qemu-9fed1bca6bc643ce91b6117f4974421aaede4751.tar.xz
qemu-9fed1bca6bc643ce91b6117f4974421aaede4751.zip
Merge tag 'pull-target-arm-20220711' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm: * Implement SME emulation, for both system and linux-user # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmLMLC8ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3sR6D/wN7+rQ86FnPEpeqqh37Chx # dyCwmAjad7cSJWY4d6RlhNBll35D2nPIdo7MQrUi7ViNL+mDRGr4xSeYOU3IBXd7 # hxRY2rAjwlVtpL6WWJkHeZTr7n+gHtds/Pda+f7d8E7RmsXtD4uRSnbGG82HVGy0 # suG6MJwDYncSoa4AlX/J6sBBYha0cusTguTbkGkEfRonKgvQ6PAogYU8zAmI4EEz # BsdhXOjH3FGO6aUUVjZKJd1CuISNYe32sZY1OcfuiB1KbBQaRHt2LbxfKSQGMKwd # 0GzXZK9NJ0xIteAX/ESHVakudennqaBY7kdbBdLwb485pQ25r7P2jGyPM4J4fota # fXScOQKGGVfNySPwTOPR0QLzshcckWw7+Y+AOBg/rpbepSNT41bwI6Ldjs8oNtcI # O44wNgbN4uvbVul4dj0rOrc5azMvfH0cU+SSrZAInahEHpCN9o/NQz1D2fju7j9W # MujJCzRVBQSCvUwD1jX6+YDTJU3y84HeGYB/whXt8tg67Ump/5IgUInACgQzwwEZ # ZP+vxFmhuMlIkbfaiDgYdx2CLjTVSJ7YHjGx/rkqlpLVx6DgGA0klzgHV4L8fbWh # RFY8fejQve5QzsdiiDdeRWigFY2LnDEnphwOAy7tzktRpai8FnK3aMZyIj/5WODL # uu+gSmYoToLhC35Uan5otg== # =D1/T # -----END PGP SIGNATURE----- # gpg: Signature made Mon 11 Jul 2022 07:27:03 PM +0530 # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] * tag 'pull-target-arm-20220711' of https://git.linaro.org/people/pmaydell/qemu-arm: (45 commits) linux-user/aarch64: Add SME related hwcap entries target/arm: Enable SME for user-only target/arm: Only set ZEN in reset if SVE present linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL linux-user: Rename sve prctls linux-user/aarch64: Implement SME signal handling linux-user/aarch64: Move sve record checks into restore linux-user/aarch64: Verify extra record lock succeeded linux-user/aarch64: Do not allow duplicate or short sve records linux-user/aarch64: Tidy target_restore_sigframe error return linux-user/aarch64: Add SM bit to SVE signal context linux-user/aarch64: Reset PSTATE.SM on syscalls linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS target/arm: Enable SME for -cpu max target/arm: Reset streaming sve state on exception boundaries target/arm: Implement SCLAMP, UCLAMP target/arm: Implement REVD target/arm: Implement PSEL target/arm: Implement SME integer outer product target/arm: Implement FMOPA, FMOPS (widening) ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'docs/system/arm')
-rw-r--r--docs/system/arm/emulation.rst4
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 83b4410065..8e494c8bea 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -65,6 +65,10 @@ the following architecture extensions:
- FEAT_SHA512 (Advanced SIMD SHA512 instructions)
- FEAT_SM3 (Advanced SIMD SM3 instructions)
- FEAT_SM4 (Advanced SIMD SM4 instructions)
+- FEAT_SME (Scalable Matrix Extension)
+- FEAT_SME_FA64 (Full A64 instruction set in Streaming SVE mode)
+- FEAT_SME_F64F64 (Double-precision floating-point outer product instructions)
+- FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions)
- FEAT_SPECRES (Speculation restriction instructions)
- FEAT_SSBS (Speculative Store Bypass Safe)
- FEAT_TLBIOS (TLB invalidate instructions in Outer Shareable domain)