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author | Stefan Hajnoczi | 2022-09-06 00:01:02 +0200 |
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committer | Stefan Hajnoczi | 2022-09-06 00:01:02 +0200 |
commit | fd28528ece590dc709d1a893fce2ff2f68ddca70 (patch) | |
tree | 1e7235fb2cae6d8fa14dc8e4d9ff27b04de03fae /docs/system/target-openrisc.rst | |
parent | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (diff) | |
parent | docs/system: openrisc: Add OpenRISC documentation (diff) | |
download | qemu-fd28528ece590dc709d1a893fce2ff2f68ddca70.tar.gz qemu-fd28528ece590dc709d1a893fce2ff2f68ddca70.tar.xz qemu-fd28528ece590dc709d1a893fce2ff2f68ddca70.zip |
Merge tag 'pull-or1k-20220904' of https://github.com/stffrdhrn/qemu into staging
OpenRISC updates for 7.2.0
Updates to add the OpenRISC virt plaform to QEMU. Highlights
include:
- New virt plaform with, virtio and pci bus support
- OpenRISC support for MTTCG
- Goldfish RTC device endianness is configurable now
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* tag 'pull-or1k-20220904' of https://github.com/stffrdhrn/qemu:
docs/system: openrisc: Add OpenRISC documentation
hw/openrisc: virt: pass random seed to fdt
target/openrisc: Interrupt handling fixes
target/openrisc: Enable MTTCG
target/openrisc: Add interrupted CPU to log
hw/openrisc: Initialize timer time at startup
hw/openrisc: Add PCI bus support to virt
hw/openrisc: Add the OpenRISC virtual machine
goldfish_rtc: Add big-endian property
target/openrisc: Fix memory reading in debugger
hw/openrisc: Split re-usable boot time apis out to boot.c
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'docs/system/target-openrisc.rst')
-rw-r--r-- | docs/system/target-openrisc.rst | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/docs/system/target-openrisc.rst b/docs/system/target-openrisc.rst new file mode 100644 index 0000000000..22cb2217a6 --- /dev/null +++ b/docs/system/target-openrisc.rst @@ -0,0 +1,71 @@ +.. _OpenRISC-System-emulator: + +OpenRISC System emulator +~~~~~~~~~~~~~~~~~~~~~~~~ + +QEMU can emulate 32-bit OpenRISC CPUs using the ``qemu-system-or1k`` executable. + +OpenRISC CPUs are generally built into "system-on-chip" (SoC) designs that run +on FPGAs. These SoCs are based on the same core architecture as the or1ksim +(the original OpenRISC instruction level simulator) which QEMU supports. For +this reason QEMU does not need to support many different boards to support the +OpenRISC hardware ecosystem. + +The OpenRISC CPU supported by QEMU is the ``or1200``, it supports an MMU and can +run linux. + +Choosing a board model +====================== + +For QEMU's OpenRISC system emulation, you must specify which board model you +want to use with the ``-M`` or ``--machine`` option; the default machine is +``or1k-sim``. + +If you intend to boot Linux, it is possible to have a single kernel image that +will boot on any of the QEMU machines. To do this one would compile all required +drivers into the kernel. This is possible because QEMU will create a device tree +structure that describes the QEMU machine and pass a pointer to the structure to +the kernel. The kernel can then use this to configure itself for the machine. + +However, typically users will have specific firmware images for a specific machine. + +If you already have a system image or a kernel that works on hardware and you +want to boot with QEMU, check whether QEMU lists that machine in its ``-machine +help`` output. If it is listed, then you can probably use that board model. If +it is not listed, then unfortunately your image will almost certainly not boot +on QEMU. (You might be able to extract the filesystem and use that with a +different kernel which boots on a system that QEMU does emulate.) + +If you don't care about reproducing the idiosyncrasies of a particular +bit of hardware, such as small amount of RAM, no PCI or other hard disk, etc., +and just want to run Linux, the best option is to use the ``virt`` board. This +is a platform which doesn't correspond to any real hardware and is designed for +use in virtual machines. You'll need to compile Linux with a suitable +configuration for running on the ``virt`` board. ``virt`` supports PCI, virtio +and large amounts of RAM. + +Board-specific documentation +============================ + +.. + This table of contents should be kept sorted alphabetically + by the title text of each file, which isn't the same ordering + as an alphabetical sort by filename. + +.. toctree:: + :maxdepth: 1 + + openrisc/or1k-sim + openrisc/virt + +Emulated CPU architecture support +================================= + +.. toctree:: + openrisc/emulation + +OpenRISC CPU features +===================== + +.. toctree:: + openrisc/cpu-features |