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author | Havard Skinnemoen | 2020-10-23 23:06:35 +0200 |
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committer | Peter Maydell | 2020-10-27 12:10:10 +0100 |
commit | 326ccfe240ca9ef4f659a241b39390fa956e999b (patch) | |
tree | ae846cdf53e92e1d0d629d1f5a5e7a230effda7b /docs/system | |
parent | hw/timer: Adding watchdog for NPCM7XX Timer. (diff) | |
download | qemu-326ccfe240ca9ef4f659a241b39390fa956e999b.tar.gz qemu-326ccfe240ca9ef4f659a241b39390fa956e999b.tar.xz qemu-326ccfe240ca9ef4f659a241b39390fa956e999b.zip |
hw/misc: Add npcm7xx random number generator
The RNG module returns a byte of randomness when the Data Valid bit is
set.
This implementation ignores the prescaler setting, and loads a new value
into RNGD every time RNGCS is read while the RNG is enabled and random
data is available.
A qtest featuring some simple randomness tests is included.
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system')
-rw-r--r-- | docs/system/arm/nuvoton.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst index e3e1a3a3a7..4342434df4 100644 --- a/docs/system/arm/nuvoton.rst +++ b/docs/system/arm/nuvoton.rst @@ -38,6 +38,7 @@ Supported devices * DDR4 memory controller (dummy interface indicating memory training is done) * OTP controllers (no protection features) * Flash Interface Unit (FIU; no protection features) + * Random Number Generator (RNG) Missing devices --------------- @@ -59,7 +60,6 @@ Missing devices * Peripheral SPI controller (PSPI) * Analog to Digital Converter (ADC) * SD/MMC host - * Random Number Generator (RNG) * PECI interface * Pulse Width Modulation (PWM) * Tachometer |