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authorRoss Zwisler2018-06-08 00:31:11 +0200
committerMichael S. Tsirkin2018-06-11 21:19:57 +0200
commit11c39b5cd966ddc067a1ca0c5392ec9b666c45b7 (patch)
treeaff666dadd919b34c5dac5b69f73b956e40050b3 /docs
parenthw/i386: Update SSDT table used by "make check" (diff)
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nvdimm: make persistence option symbolic
Replace the "nvdimm-cap" option which took numeric arguments such as "2" with a more user friendly "nvdimm-persistence" option which takes symbolic arguments "cpu" or "mem-ctrl". Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com> Suggested-by: Michael S. Tsirkin <mst@redhat.com> Suggested-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'docs')
-rw-r--r--docs/nvdimm.txt31
1 files changed, 12 insertions, 19 deletions
diff --git a/docs/nvdimm.txt b/docs/nvdimm.txt
index 8b48fb4633..24b443b655 100644
--- a/docs/nvdimm.txt
+++ b/docs/nvdimm.txt
@@ -154,29 +154,22 @@ guest software that this vNVDIMM device contains a region that cannot
accept persistent writes. In result, for example, the guest Linux
NVDIMM driver, marks such vNVDIMM device as read-only.
-Platform Capabilities
----------------------
+NVDIMM Persistence
+------------------
ACPI 6.2 Errata A added support for a new Platform Capabilities Structure
which allows the platform to communicate what features it supports related to
-NVDIMM data durability. Users can provide a capabilities value to a guest via
-the optional "nvdimm-cap" machine command line option:
+NVDIMM data persistence. Users can provide a persistence value to a guest via
+the optional "nvdimm-persistence" machine command line option:
- -machine pc,accel=kvm,nvdimm,nvdimm-cap=2
+ -machine pc,accel=kvm,nvdimm,nvdimm-persistence=cpu
-This "nvdimm-cap" field is an integer, and is the combined value of the
-various capability bits defined in table 5-137 of the ACPI 6.2 Errata A spec.
+There are currently two valid values for this option:
-Here is a quick summary of the three bits that are defined as of that spec:
+"mem-ctrl" - The platform supports flushing dirty data from the memory
+ controller to the NVDIMMs in the event of power loss.
-Bit[0] - CPU Cache Flush to NVDIMM Durability on Power Loss Capable.
-Bit[1] - Memory Controller Flush to NVDIMM Durability on Power Loss Capable.
- Note: If bit 0 is set to 1 then this bit shall be set to 1 as well.
-Bit[2] - Byte Addressable Persistent Memory Hardware Mirroring Capable.
-
-So, a "nvdimm-cap" value of 2 would mean that the platform supports Memory
-Controller Flush on Power Loss, a value of 3 would mean that the platform
-supports CPU Cache Flush and Memory Controller Flush on Power Loss, etc.
-
-For a complete list of the flags available and for more detailed descriptions,
-please consult the ACPI spec.
+"cpu" - The platform supports flushing dirty data from the CPU cache to
+ the NVDIMMs in the event of power loss. This implies that the
+ platform also supports flushing dirty data through the memory
+ controller on power loss.