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author | Peter Maydell | 2022-10-21 18:01:31 +0200 |
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committer | Peter Maydell | 2022-10-27 11:27:23 +0200 |
commit | e4c93e44ab103f6c67abd85d620343f61aafa004 (patch) | |
tree | 29ff31acaafd54705245a67e216b2e0cca8fc3e3 /docs | |
parent | Merge tag 'dump-pull-request' of https://gitlab.com/marcandre.lureau/qemu int... (diff) | |
download | qemu-e4c93e44ab103f6c67abd85d620343f61aafa004.tar.gz qemu-e4c93e44ab103f6c67abd85d620343f61aafa004.tar.xz qemu-e4c93e44ab103f6c67abd85d620343f61aafa004.zip |
target/arm: Implement FEAT_E0PD
FEAT_E0PD adds new bits E0PD0 and E0PD1 to TCR_EL1, which allow the
OS to forbid EL0 access to half of the address space. Since this is
an EL0-specific variation on the existing TCR_ELx.{EPD0,EPD1}, we can
implement it entirely in aa64_va_parameters().
This requires moving the existing regime_is_user() to internals.h
so that the code in helper.c can get at it.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221021160131.3531787-1-peter.maydell@linaro.org
Diffstat (limited to 'docs')
-rw-r--r-- | docs/system/arm/emulation.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index cfb4b0768b..fd61360a08 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -24,6 +24,7 @@ the following architecture extensions: - FEAT_Debugv8p4 (Debug changes for v8.4) - FEAT_DotProd (Advanced SIMD dot product instructions) - FEAT_DoubleFault (Double Fault Extension) +- FEAT_E0PD (Preventing EL0 access to halves of address maps) - FEAT_ETS (Enhanced Translation Synchronization) - FEAT_FCMA (Floating-point complex number instructions) - FEAT_FHM (Floating-point half-precision multiplication instructions) |