diff options
| author | Peter Maydell | 2010-12-16 12:51:18 +0100 |
|---|---|---|
| committer | Aurelien Jarno | 2011-01-02 23:59:03 +0100 |
| commit | 011da610ba6416df54feed46bcde1955211a2149 (patch) | |
| tree | 41544bf6f962d2e0375b859765f840a1986f036a /fpu | |
| parent | softfloat: abstract out target-specific NaN propagation rules (diff) | |
| download | qemu-011da610ba6416df54feed46bcde1955211a2149.tar.gz qemu-011da610ba6416df54feed46bcde1955211a2149.tar.xz qemu-011da610ba6416df54feed46bcde1955211a2149.zip | |
target-arm: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'fpu')
| -rw-r--r-- | fpu/softfloat-specialize.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 8dcf469ee6..f43f2d0ace 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -168,6 +168,28 @@ static float32 commonNaNToFloat32( commonNaNT a ) | tie-break rule. *----------------------------------------------------------------------------*/ +#if defined(TARGET_ARM) +static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, + flag aIsLargerSignificand) +{ + /* ARM mandated NaN propagation rules: take the first of: + * 1. A if it is signaling + * 2. B if it is signaling + * 3. A (quiet) + * 4. B (quiet) + * A signaling NaN is always quietened before returning it. + */ + if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (aIsQNaN) { + return 0; + } else { + return 1; + } +} +#else static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, flag aIsLargerSignificand) { @@ -197,6 +219,7 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, return 1; } } +#endif /*---------------------------------------------------------------------------- | Takes two single-precision floating-point values `a' and `b', one of which |