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authorRichard Henderson2021-12-17 17:57:14 +0100
committerCédric Le Goater2021-12-17 17:57:14 +0100
commit10cc964030fca459591d9353571f3b1b4e1b5aec (patch)
tree47d9ec729de0bb445e48a8f9629e47ac2a88b814 /fpu
parentsoftfloat: Add flag specific to Inf * 0 (diff)
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softfloat: Add flags specific to Inf / Inf and 0 / 0
PowerPC has these flags, and it's easier to compute them here than after the fact. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211119160502.17432-5-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat-parts.c.inc16
1 files changed, 11 insertions, 5 deletions
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
index 3ed793347b..b8563cd2df 100644
--- a/fpu/softfloat-parts.c.inc
+++ b/fpu/softfloat-parts.c.inc
@@ -590,11 +590,13 @@ static FloatPartsN *partsN(div)(FloatPartsN *a, FloatPartsN *b,
}
/* 0/0 or Inf/Inf => NaN */
- if (unlikely(ab_mask == float_cmask_zero) ||
- unlikely(ab_mask == float_cmask_inf)) {
- float_raise(float_flag_invalid, s);
- parts_default_nan(a, s);
- return a;
+ if (unlikely(ab_mask == float_cmask_zero)) {
+ float_raise(float_flag_invalid | float_flag_invalid_zdz, s);
+ goto d_nan;
+ }
+ if (unlikely(ab_mask == float_cmask_inf)) {
+ float_raise(float_flag_invalid | float_flag_invalid_idi, s);
+ goto d_nan;
}
/* All the NaN cases */
@@ -625,6 +627,10 @@ static FloatPartsN *partsN(div)(FloatPartsN *a, FloatPartsN *b,
float_raise(float_flag_divbyzero, s);
a->cls = float_class_inf;
return a;
+
+ d_nan:
+ parts_default_nan(a, s);
+ return a;
}
/*