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author | Alex Bennée | 2017-07-19 12:49:42 +0200 |
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committer | Alex Bennée | 2018-02-21 11:20:37 +0100 |
commit | 13894527f522caab4ec74334191ef29af975e521 (patch) | |
tree | 0bdd9d19c91251322ef896b7d6519ace3090c697 /fpu | |
parent | include/fpu/softfloat: add some float16 constants (diff) | |
download | qemu-13894527f522caab4ec74334191ef29af975e521.tar.gz qemu-13894527f522caab4ec74334191ef29af975e521.tar.xz qemu-13894527f522caab4ec74334191ef29af975e521.zip |
fpu/softfloat: improve comments on ARM NaN propagation
Mention the pseudo-code fragment from which this is based.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu')
-rw-r--r-- | fpu/softfloat-specialize.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index de2c5d5702..4be0fb21ba 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -445,9 +445,10 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status) #if defined(TARGET_ARM) static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, - flag aIsLargerSignificand) + flag aIsLargerSignificand) { - /* ARM mandated NaN propagation rules: take the first of: + /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take + * the first of: * 1. A if it is signaling * 2. B if it is signaling * 3. A (quiet) |