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| author | Peter Maydell | 2021-05-13 21:13:24 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-05-13 21:13:24 +0200 |
| commit | 2d3fc4e2b069494b1e9e2e4a1e3de24cbc036426 (patch) | |
| tree | d7b6b804dc1306dda29fc775b7e91791d8ad5277 /fpu | |
| parent | Merge remote-tracking branch 'remotes/philmd/tags/pflash-20210511' into staging (diff) | |
| parent | Drop the deprecated unicore32 target (diff) | |
| download | qemu-2d3fc4e2b069494b1e9e2e4a1e3de24cbc036426.tar.gz qemu-2d3fc4e2b069494b1e9e2e4a1e3de24cbc036426.tar.xz qemu-2d3fc4e2b069494b1e9e2e4a1e3de24cbc036426.zip | |
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging
Miscellaneous patches for 2021-05-12
# gpg: Signature made Wed 12 May 2021 17:22:15 BST
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2021-05-12:
Drop the deprecated unicore32 target
Drop the deprecated lm32 target
block: Drop the sheepdog block driver
Remove the deprecated moxie target
monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu')
| -rw-r--r-- | fpu/softfloat-specialize.c.inc | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 78f699d6f8..e19809c04b 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -103,7 +103,7 @@ static inline bool snan_bit_is_one(float_status *status) { #if defined(TARGET_MIPS) return status->snan_bit_is_one; -#elif defined(TARGET_HPPA) || defined(TARGET_UNICORE32) || defined(TARGET_SH4) +#elif defined(TARGET_HPPA) || defined(TARGET_SH4) return 1; #else return 0; @@ -149,11 +149,10 @@ static FloatParts parts_default_nan(float_status *status) sign = 1; frac = ~0ULL; #else - /* This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V, - * S390, SH4, TriCore, and Xtensa. I cannot find documentation - * for Unicore32; the choice from the original commit is unchanged. - * Our other supported targets, CRIS, LM32, Moxie, Nios2, and Tile, - * do not have floating-point. + /* + * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V, + * S390, SH4, TriCore, and Xtensa. Our other supported targets, + * CRIS, Nios2, and Tile, do not have floating-point. */ if (snan_bit_is_one(status)) { /* set all bits other than msb */ |