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| author | Richard Henderson | 2020-11-21 03:28:31 +0100 |
|---|---|---|
| committer | Richard Henderson | 2021-06-03 23:04:02 +0200 |
| commit | d6e1f0cd59a59a27a2b109600653e57917cc9594 (patch) | |
| tree | 3cb4ea079caa5333714b39206b0893fb370c6d2b /fpu | |
| parent | softfloat: Split out parts_uncanon_normal (diff) | |
| download | qemu-d6e1f0cd59a59a27a2b109600653e57917cc9594.tar.gz qemu-d6e1f0cd59a59a27a2b109600653e57917cc9594.tar.xz qemu-d6e1f0cd59a59a27a2b109600653e57917cc9594.zip | |
softfloat: Reduce FloatFmt
Remove frac_lsb, frac_lsbm1, roundeven_mask. Compute
these from round_mask in parts$N_uncanon_normal.
With floatx80, round_mask will not be tied to frac_shift.
Everything else is easily computable.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu')
| -rw-r--r-- | fpu/softfloat-parts.c.inc | 6 | ||||
| -rw-r--r-- | fpu/softfloat.c | 29 |
2 files changed, 15 insertions, 20 deletions
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index e05909db8c..a026581c33 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -145,10 +145,10 @@ static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s, { const int exp_max = fmt->exp_max; const int frac_shift = fmt->frac_shift; - const uint64_t frac_lsb = fmt->frac_lsb; - const uint64_t frac_lsbm1 = fmt->frac_lsbm1; const uint64_t round_mask = fmt->round_mask; - const uint64_t roundeven_mask = fmt->roundeven_mask; + const uint64_t frac_lsb = round_mask + 1; + const uint64_t frac_lsbm1 = round_mask ^ (round_mask >> 1); + const uint64_t roundeven_mask = round_mask | frac_lsb; uint64_t inc; bool overflow_norm = false; int exp, flags = 0; diff --git a/fpu/softfloat.c b/fpu/softfloat.c index ea7ee13201..741480c568 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -563,9 +563,7 @@ typedef struct { * frac_size: the size of the fraction field * frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT * The following are computed based the size of fraction - * frac_lsb: least significant bit of fraction - * frac_lsbm1: the bit below the least significant bit (for rounding) - * round_mask/roundeven_mask: masks used for rounding + * round_mask: bits below lsb which must be rounded * The following optional modifiers are available: * arm_althp: handle ARM Alternative Half Precision */ @@ -575,24 +573,21 @@ typedef struct { int exp_max; int frac_size; int frac_shift; - uint64_t frac_lsb; - uint64_t frac_lsbm1; - uint64_t round_mask; - uint64_t roundeven_mask; bool arm_althp; + uint64_t round_mask; } FloatFmt; /* Expand fields based on the size of exponent and fraction */ -#define FLOAT_PARAMS(E, F) \ - .exp_size = E, \ - .exp_bias = ((1 << E) - 1) >> 1, \ - .exp_max = (1 << E) - 1, \ - .frac_size = F, \ - .frac_shift = (-F - 1) & 63, \ - .frac_lsb = 1ull << ((-F - 1) & 63), \ - .frac_lsbm1 = 1ull << ((-F - 2) & 63), \ - .round_mask = (1ull << ((-F - 1) & 63)) - 1, \ - .roundeven_mask = (2ull << ((-F - 1) & 63)) - 1 +#define FLOAT_PARAMS_(E, F) \ + .exp_size = E, \ + .exp_bias = ((1 << E) - 1) >> 1, \ + .exp_max = (1 << E) - 1, \ + .frac_size = F + +#define FLOAT_PARAMS(E, F) \ + FLOAT_PARAMS_(E, F), \ + .frac_shift = (-F - 1) & 63, \ + .round_mask = (1ull << ((-F - 1) & 63)) - 1 static const FloatFmt float16_params = { FLOAT_PARAMS(5, 10) |