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authorRichard Henderson2021-06-08 00:38:12 +0200
committerRichard Henderson2021-06-14 02:42:40 +0200
commitf291f45f4ef445ccc1aaf7b5bc595dab17d89e8d (patch)
treea51f726b48dfb0b9c9f84ac062a23d8b5ab0277e /fpu
parenttcg/arm: Fix tcg_out_op function signature (diff)
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softfloat: Fix tp init in float32_exp2
Typo in the conversion to FloatParts64. Fixes: 572c4d862ff2 Fixes: Coverity CID 1457457 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210607223812.110596-1-richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 1cb162882b..4d0160fe9c 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -4818,7 +4818,7 @@ float32 float32_exp2(float32 a, float_status *status)
float_raise(float_flag_inexact, status);
- float64_unpack_canonical(&xnp, float64_ln2, status);
+ float64_unpack_canonical(&tp, float64_ln2, status);
xp = *parts_mul(&xp, &tp, status);
xnp = xp;