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| author | Peter Maydell | 2017-09-21 17:28:59 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-09-21 17:28:59 +0200 |
| commit | 17906a162a1febef92e1d3eddc090e967a351757 (patch) | |
| tree | 2775332378ae84f30e7081990fe7c0956ade32ad /fsdev | |
| parent | target/arm: Implement MSR/MRS access to NS banked registers (diff) | |
| download | qemu-17906a162a1febef92e1d3eddc090e967a351757.tar.gz qemu-17906a162a1febef92e1d3eddc090e967a351757.tar.xz qemu-17906a162a1febef92e1d3eddc090e967a351757.zip | |
nvic: Add banked exception states
For the v8M security extension, some exceptions must be banked
between security states. Add the new vecinfo array which holds
the state for the banked exceptions and migrate it if the
CPU the NVIC is attached to implements the security extension.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fsdev')
0 files changed, 0 insertions, 0 deletions