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author | Peter Maydell | 2021-01-15 14:22:54 +0100 |
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committer | Peter Maydell | 2021-01-15 14:22:54 +0100 |
commit | 256af05f52b5f944482341273a77511089d64435 (patch) | |
tree | 265ec7f999f198eb476a9c56766584c7703268d4 /hmp-commands.hx | |
parent | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210113' into... (diff) | |
parent | docs/system: Remove deprecated 'fulong2e' machine alias (diff) | |
download | qemu-256af05f52b5f944482341273a77511089d64435.tar.gz qemu-256af05f52b5f944482341273a77511089d64435.tar.xz qemu-256af05f52b5f944482341273a77511089d64435.zip |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210114' into staging
MIPS patches queue
- Simplify CPU/ISA definitions
- Various maintenance code movements in translate.c
- Convert part of the MSA ASE instructions to decodetree
- Convert some instructions removed from Release 6 to decodetree
- Remove deprecated 'fulong2e' machine alias
# gpg: Signature made Thu 14 Jan 2021 16:16:29 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/mips-20210114: (69 commits)
docs/system: Remove deprecated 'fulong2e' machine alias
target/mips: Remove vendor specific CPU definitions
target/mips: Remove CPU_NANOMIPS32 definition
target/mips: Remove CPU_R5900 definition
target/mips: Convert Rel6 LL/SC opcodes to decodetree
target/mips: Convert Rel6 LLD/SCD opcodes to decodetree
target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree
target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree
target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree
target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree
target/mips: Convert Rel6 COP1X opcode to decodetree
target/mips: Convert Rel6 Special2 opcode to decodetree
target/mips: Remove now unreachable LSA/DLSA opcodes code
target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes
target/mips: Extract LSA/DLSA translation generators
target/mips: Use decode_ase_msa() generated from decodetree
target/mips: Introduce decode tree bindings for MSA ASE
target/mips: Pass TCGCond argument to MSA gen_check_zero_element()
target/mips: Extract MSA translation routines
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hmp-commands.hx')
0 files changed, 0 insertions, 0 deletions