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author | Peter Maydell | 2019-02-01 15:55:42 +0100 |
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committer | Peter Maydell | 2019-02-01 15:55:42 +0100 |
commit | 4b635cf7a95e5012113570a87e134962a0271a27 (patch) | |
tree | 89952d71aacae52c0cbc695eb3222b5c48bc004c /hmp-commands.hx | |
parent | hw/arm/armsse: Make number of SRAM banks parameterised (diff) | |
download | qemu-4b635cf7a95e5012113570a87e134962a0271a27.tar.gz qemu-4b635cf7a95e5012113570a87e134962a0271a27.tar.xz qemu-4b635cf7a95e5012113570a87e134962a0271a27.zip |
hw/arm/armsse: Make SRAM bank size configurable
For the IoTKit the SRAM bank size is always 32K (15 bits); for the
SSE-200 this is a configurable parameter, which defaults to 32K but
can be changed when it is built into a particular SoC. For instance
the Musca-B1 board sets it to 128K (17 bits).
Make the bank size a QOM property. We follow the SSE-200 hardware in
naming the parameter SRAM_ADDR_WIDTH, which specifies the number of
address bits of a single SRAM bank.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-11-peter.maydell@linaro.org
Diffstat (limited to 'hmp-commands.hx')
0 files changed, 0 insertions, 0 deletions