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| author | Markus Armbruster | 2019-04-02 18:18:58 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2019-05-21 00:40:02 +0200 |
| commit | b37d56ece9878f934126da7efbcbb9a512f191ad (patch) | |
| tree | 5462d44a3e50c9c6ba903fb1858f585388f7ed84 /hw/acpi/piix4.c | |
| parent | contrib/vhost-user-blk: enable inflight I/O tracking (diff) | |
| download | qemu-b37d56ece9878f934126da7efbcbb9a512f191ad.tar.gz qemu-b37d56ece9878f934126da7efbcbb9a512f191ad.tar.xz qemu-b37d56ece9878f934126da7efbcbb9a512f191ad.zip | |
acpi/piix4: Convert debug printf()s to trace events
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190402161900.7374-2-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/acpi/piix4.c')
| -rw-r--r-- | hw/acpi/piix4.c | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index c903e65169..ec4e186cec 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -39,14 +39,7 @@ #include "hw/acpi/acpi_dev_interface.h" #include "hw/xen/xen.h" #include "qom/cpu.h" - -//#define DEBUG - -#ifdef DEBUG -# define PIIX4_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) -#else -# define PIIX4_DPRINTF(format, ...) do { } while (0) -#endif +#include "trace.h" #define GPE_BASE 0xafe0 #define GPE_LEN 4 @@ -583,7 +576,7 @@ static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) PIIX4PMState *s = opaque; uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); - PIIX4_DPRINTF("gpe read %" HWADDR_PRIx " == %" PRIu32 "\n", addr, val); + trace_piix4_gpe_readb(addr, width, val); return val; } @@ -592,10 +585,9 @@ static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, { PIIX4PMState *s = opaque; + trace_piix4_gpe_writeb(addr, width, val); acpi_gpe_ioport_writeb(&s->ar, addr, val); acpi_update_sci(&s->ar, s->irq); - - PIIX4_DPRINTF("gpe write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, val); } static const MemoryRegionOps piix4_gpe_ops = { |