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authorAlex Williamson2012-04-05 19:07:28 +0200
committerMichael S. Tsirkin2012-04-15 11:17:23 +0200
commit9290f364c1f0c0a5a2ee8e03607f4804455c0d0e (patch)
tree78fa91baaddf702ba71e35dc713f758fde9c0c58 /hw/acpi_piix4.c
parentacpi_piix4: Remove PCI_RMV_BASE write code (diff)
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acpi_piix4: Re-define PCI hotplug eject register read
The PCI hotplug eject register has always returned 0, so let's redefine it as a hotplug feature register. The existing model of using separate up & down read-only registers and an eject via write to this register becomes the base implementation. As we make use of new interfaces we'll set bits here to allow the BIOS and AML implementation to optimize for the platform implementation. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/acpi_piix4.c')
-rw-r--r--hw/acpi_piix4.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index 5d3b0ba11e..11c1f8532b 100644
--- a/hw/acpi_piix4.c
+++ b/hw/acpi_piix4.c
@@ -511,9 +511,10 @@ static uint32_t pci_down_read(void *opaque, uint32_t addr)
return val;
}
-static uint32_t pciej_read(void *opaque, uint32_t addr)
+static uint32_t pci_features_read(void *opaque, uint32_t addr)
{
- PIIX4_DPRINTF("pciej read %x\n", addr);
+ /* No feature defined yet */
+ PIIX4_DPRINTF("pci_features_read %x\n", 0);
return 0;
}
@@ -545,7 +546,7 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s)
register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s);
register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, s);
- register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, s);
+ register_ioport_read(PCI_EJ_BASE, 4, 4, pci_features_read, s);
register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s);