diff options
author | malc | 2009-10-01 20:20:47 +0200 |
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committer | malc | 2009-10-01 20:45:02 +0200 |
commit | 99a0949b720a0936da2052cb9a46db04ffc6db29 (patch) | |
tree | f9e39633853e35b49fc4465337cc196b9650866e /hw/apic.c | |
parent | Include microblaze binaries in tarbin. (diff) | |
download | qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.gz qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.xz qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.zip |
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.
Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw/apic.c')
-rw-r--r-- | hw/apic.c | 14 |
1 files changed, 7 insertions, 7 deletions
@@ -661,25 +661,25 @@ static void apic_timer(void *opaque) apic_timer_update(s, s->next_time); } -static uint32_t apic_mem_readb(void *opaque, target_phys_addr_t addr) +static uint32_t apic_mem_readb(void *opaque, a_target_phys_addr addr) { return 0; } -static uint32_t apic_mem_readw(void *opaque, target_phys_addr_t addr) +static uint32_t apic_mem_readw(void *opaque, a_target_phys_addr addr) { return 0; } -static void apic_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apic_mem_writeb(void *opaque, a_target_phys_addr addr, uint32_t val) { } -static void apic_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apic_mem_writew(void *opaque, a_target_phys_addr addr, uint32_t val) { } -static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) +static uint32_t apic_mem_readl(void *opaque, a_target_phys_addr addr) { CPUState *env; APICState *s; @@ -760,7 +760,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } -static void apic_send_msi(target_phys_addr_t addr, uint32 data) +static void apic_send_msi(a_target_phys_addr addr, uint32 data) { uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; @@ -771,7 +771,7 @@ static void apic_send_msi(target_phys_addr_t addr, uint32 data) apic_deliver_irq(dest, dest_mode, delivery, vector, 0, trigger_mode); } -static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apic_mem_writel(void *opaque, a_target_phys_addr addr, uint32_t val) { CPUState *env; APICState *s; |