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| author | Philippe Mathieu-Daudé | 2020-08-28 11:02:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-08-28 11:02:45 +0200 |
| commit | b3aec952bf11ef54376db96dd673c6a34753b697 (patch) | |
| tree | 9bde17966008abe3b1ae085cf62c955bdd2f2a01 /hw/arm/allwinner-h3.c | |
| parent | target/arm: Fill in the WnR syndrome bit in mte_check_fail (diff) | |
| download | qemu-b3aec952bf11ef54376db96dd673c6a34753b697.tar.gz qemu-b3aec952bf11ef54376db96dd673c6a34753b697.tar.xz qemu-b3aec952bf11ef54376db96dd673c6a34753b697.zip | |
hw/sd/allwinner-sdhost: Use AddressSpace for DMA transfers
Allow the device to execute the DMA transfers in a different
AddressSpace.
The A10 and H3 SoC keep using the system_memory address space,
but via the proper dma_memory_access() API.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Message-id: 20200814110057.307-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/allwinner-h3.c')
| -rw-r--r-- | hw/arm/allwinner-h3.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index ff92ded82c..43a8d3dc48 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -349,6 +349,8 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_SID]); /* SD/MMC */ + object_property_set_link(OBJECT(&s->mmc0), "dma-memory", + OBJECT(get_system_memory()), &error_fatal); sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, s->memmap[AW_H3_MMC0]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, |