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| author | Niek Linnenbank | 2020-03-11 23:18:42 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-03-12 17:27:33 +0100 |
| commit | d26af5ded95c9fb9031786bf10ab0ad7c0e848e9 (patch) | |
| tree | 883b2539ea256dc072534d827749f7814ddae38c /hw/arm/allwinner-h3.c | |
| parent | hw/arm/allwinner-h3: add System Control module (diff) | |
| download | qemu-d26af5ded95c9fb9031786bf10ab0ad7c0e848e9.tar.gz qemu-d26af5ded95c9fb9031786bf10ab0ad7c0e848e9.tar.xz qemu-d26af5ded95c9fb9031786bf10ab0ad7c0e848e9.zip | |
hw/arm/allwinner: add CPU Configuration module
Various Allwinner System on Chip designs contain multiple processors
that can be configured and reset using the generic CPU Configuration
module interface. This commit adds support for the Allwinner CPU
configuration interface which emulates the following features:
* CPU reset
* CPU status
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200311221854.30370-7-nieklinnenbank@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/allwinner-h3.c')
| -rw-r--r-- | hw/arm/allwinner-h3.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index 0aa46712db..b9a5597f2a 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -56,6 +56,7 @@ const hwaddr allwinner_h3_memmap[] = { [AW_H3_GIC_CPU] = 0x01c82000, [AW_H3_GIC_HYP] = 0x01c84000, [AW_H3_GIC_VCPU] = 0x01c86000, + [AW_H3_CPUCFG] = 0x01f01c00, [AW_H3_SDRAM] = 0x40000000 }; @@ -122,7 +123,6 @@ struct AwH3Unimplemented { { "r_wdog", 0x01f01000, 1 * KiB }, { "r_prcm", 0x01f01400, 1 * KiB }, { "r_twd", 0x01f01800, 1 * KiB }, - { "r_cpucfg", 0x01f01c00, 1 * KiB }, { "r_cir-rx", 0x01f02000, 1 * KiB }, { "r_twi", 0x01f02400, 1 * KiB }, { "r_uart", 0x01f02800, 1 * KiB }, @@ -195,6 +195,9 @@ static void allwinner_h3_init(Object *obj) sysbus_init_child_obj(obj, "sysctrl", &s->sysctrl, sizeof(s->sysctrl), TYPE_AW_H3_SYSCTRL); + + sysbus_init_child_obj(obj, "cpucfg", &s->cpucfg, sizeof(s->cpucfg), + TYPE_AW_CPUCFG); } static void allwinner_h3_realize(DeviceState *dev, Error **errp) @@ -308,6 +311,10 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) qdev_init_nofail(DEVICE(&s->sysctrl)); sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysctrl), 0, s->memmap[AW_H3_SYSCTRL]); + /* CPU Configuration */ + qdev_init_nofail(DEVICE(&s->cpucfg)); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, s->memmap[AW_H3_CPUCFG]); + /* Universal Serial Bus */ sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0], qdev_get_gpio_in(DEVICE(&s->gic), |