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| author | Amithash Prasad | 2019-09-25 16:32:26 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-10-15 19:09:04 +0200 |
| commit | 1ff68783f6e94b3c1ab909f92911a04d7183241c (patch) | |
| tree | c3ee5e56804adc88a16c8416d3311f7968a6ce17 /hw/arm/aspeed.c | |
| parent | target/arm/arm-semi: Implement SH_EXT_STDOUT_STDERR extension (diff) | |
| download | qemu-1ff68783f6e94b3c1ab909f92911a04d7183241c.tar.gz qemu-1ff68783f6e94b3c1ab909f92911a04d7183241c.tar.xz qemu-1ff68783f6e94b3c1ab909f92911a04d7183241c.zip | |
aspeed/wdt: Check correct register for clock source
When WDT_RESTART is written, the data is not the contents
of the WDT_CTRL register. Hence ensure we are looking at
WDT_CTRL to check if bit WDT_CTRL_1MHZ_CLK is set or not.
Signed-off-by: Amithash Prasad <amithash@fb.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190925143248.10000-2-clg@kaod.org
[clg: improved Suject prefix ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/aspeed.c')
0 files changed, 0 insertions, 0 deletions