diff options
author | Peter Maydell | 2019-10-25 14:12:16 +0200 |
---|---|---|
committer | Peter Maydell | 2019-10-25 14:12:16 +0200 |
commit | 7bc8f9734213b76e76631a483be13d6737c2adbc (patch) | |
tree | 57158eb4d19eeec866bb7b0363164740ac0f1f42 /hw/arm/aspeed.c | |
parent | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' into... (diff) | |
parent | hw/arm/highbank: Use AddressSpace when using write_secondary_boot() (diff) | |
download | qemu-7bc8f9734213b76e76631a483be13d6737c2adbc.tar.gz qemu-7bc8f9734213b76e76631a483be13d6737c2adbc.tar.xz qemu-7bc8f9734213b76e76631a483be13d6737c2adbc.zip |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191025' into staging
target-arm queue:
* raspi boards: some cleanup
* raspi: implement the bcm2835 system timer device
* raspi: implement a dummy thermal sensor
* misc devices: switch to ptimer transaction API
* cache TB flag state to improve performance of cpu_get_tb_cpu_state
* aspeed: Add an AST2600 eval board
# gpg: Signature made Fri 25 Oct 2019 13:11:25 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20191025: (42 commits)
hw/arm/highbank: Use AddressSpace when using write_secondary_boot()
hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot
hw/arm/bcm2836: Rename cpus[] as cpu[].core
hw/arm/bcm2836: Make the SoC code modular
hw/arm/bcm2835_peripherals: Use the SYS_timer
hw/timer/bcm2835: Add the BCM2835 SYS_timer
hw/arm/bcm2835_peripherals: Use the thermal sensor block
hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API
hw/m68k/mcf5206.c: Switch to transaction-based ptimer API
hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API
hw/timer/slavio_timer.c: Switch to transaction-based ptimer API
hw/timer/slavio_timer: Remove useless check for NULL t->timer
hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API
hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API
hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API
target/arm: Rely on hflags correct in cpu_get_tb_cpu_state
linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN
linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN
target/arm: Rebuild hflags for M-profile NVIC
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/aspeed.c')
-rw-r--r-- | hw/arm/aspeed.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 52993f84b4..028191ff36 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -88,6 +88,10 @@ struct AspeedBoardState { /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 +/* AST2600 evb hardware value */ +#define AST2600_EVB_HW_STRAP1 0x000000C0 +#define AST2600_EVB_HW_STRAP2 0x00000003 + /* * The max ram region is for firmwares that scan the address space * with load/store to guess how much RAM the SoC has. @@ -187,6 +191,8 @@ static void aspeed_board_init(MachineState *machine, &error_abort); object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1", &error_abort); + object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap2, "hw-strap2", + &error_abort); object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs", &error_abort); object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus", @@ -308,6 +314,12 @@ static void ast2500_evb_i2c_init(AspeedBoardState *bmc) i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); } +static void ast2600_evb_i2c_init(AspeedBoardState *bmc) +{ + /* Start with some devices on our I2C busses */ + ast2500_evb_i2c_init(bmc); +} + static void romulus_bmc_i2c_init(AspeedBoardState *bmc) { AspeedSoCState *soc = &bmc->soc; @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { .num_cs = 2, .i2c_init = witherspoon_bmc_i2c_init, .ram = 512 * MiB, + }, { + .name = MACHINE_TYPE_NAME("ast2600-evb"), + .desc = "Aspeed AST2600 EVB (Cortex A7)", + .soc_name = "ast2600-a0", + .hw_strap1 = AST2600_EVB_HW_STRAP1, + .hw_strap2 = AST2600_EVB_HW_STRAP2, + .fmc_model = "w25q512jv", + .spi_model = "mx66u51235f", + .num_cs = 1, + .i2c_init = ast2600_evb_i2c_init, + .ram = 1 * GiB, }, }; |