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authorRichard Henderson2021-10-12 13:41:59 +0200
committerRichard Henderson2021-10-12 13:41:59 +0200
commit81d8537cb297d57b0897797f1329e4d755a0eaf4 (patch)
tree360aa93c0291dc6557a7dbe6a45de2779e584ddd /hw/arm/aspeed.c
parentMerge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ... (diff)
parentaspeed/smc: Dump address offset in trace events (diff)
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Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211012' into staging
Aspeed patches : * I2C QOMify (Cedric) * SMC model cleanup and QOMify (Cedric) * ADC model (Peter and Andrew) * GPIO fixes (Peter) # gpg: Signature made Tue 12 Oct 2021 12:36:22 AM PDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/clg/tags/pull-aspeed-20211012: aspeed/smc: Dump address offset in trace events aspeed/wdt: Add trace events hw/arm: Integrate ADC model into Aspeed SoC hw/adc: Add basic Aspeed ADC model hw: aspeed_gpio: Fix GPIO array indexing hw: aspeed_gpio: Fix pin I/O type declarations aspeed/i2c: QOMify AspeedI2CBus aspeed/smc: Remove unused attribute 'irqline' aspeed/smc: Introduce a new addr_width() class handler aspeed/smc: Add default reset values aspeed/smc: QOMify AspeedSMCFlash aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs' aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash aspeed/smc: Drop AspeedSMCController structure aspeed/smc: Stop using the model name for the memory regions aspeed/smc: Introduce aspeed_smc_error() helper aspeed/smc: Add watchdog Control/Status Registers Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/arm/aspeed.c')
-rw-r--r--hw/arm/aspeed.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ba5f1dc5af..f5916e8126 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -274,18 +274,17 @@ static void aspeed_board_init_flashes(AspeedSMCState *s,
int i ;
for (i = 0; i < s->num_cs; ++i) {
- AspeedSMCFlash *fl = &s->flashes[i];
DriveInfo *dinfo = drive_get_next(IF_MTD);
qemu_irq cs_line;
+ DeviceState *dev;
- fl->flash = qdev_new(flashtype);
+ dev = qdev_new(flashtype);
if (dinfo) {
- qdev_prop_set_drive(fl->flash, "drive",
- blk_by_legacy_dinfo(dinfo));
+ qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo));
}
- qdev_realize_and_unref(fl->flash, BUS(s->spi), &error_fatal);
+ qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal);
- cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
+ cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
}
}
@@ -377,6 +376,7 @@ static void aspeed_machine_init(MachineState *machine)
if (drive0) {
AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
+ uint64_t size = memory_region_size(&fl->mmio);
/*
* create a ROM region using the default mapping window size of
@@ -386,15 +386,15 @@ static void aspeed_machine_init(MachineState *machine)
*/
if (ASPEED_MACHINE(machine)->mmio_exec) {
memory_region_init_alias(boot_rom, NULL, "aspeed.boot_rom",
- &fl->mmio, 0, fl->size);
+ &fl->mmio, 0, size);
memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
boot_rom);
} else {
memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
- fl->size, &error_abort);
+ size, &error_abort);
memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
boot_rom);
- write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
+ write_boot_rom(drive0, FIRMWARE_ADDR, size, &error_abort);
}
}