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| author | Cédric Le Goater | 2019-09-25 16:32:33 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-10-15 19:09:04 +0200 |
| commit | 8e00d1a97d1d0b416527debb9a0759ab8c49ec51 (patch) | |
| tree | 818d77b55905ff86e24db9af1b5cd7f04c32167c /hw/arm/aspeed_soc.c | |
| parent | aspeed/timer: Add support for IRQ status register on the AST2600 (diff) | |
| download | qemu-8e00d1a97d1d0b416527debb9a0759ab8c49ec51.tar.gz qemu-8e00d1a97d1d0b416527debb9a0759ab8c49ec51.tar.xz qemu-8e00d1a97d1d0b416527debb9a0759ab8c49ec51.zip | |
aspeed/sdmc: Introduce an object class per SoC
Use class handlers and class constants to differentiate the
characteristics of the memory controller and remove the 'silicon_rev'
property.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-9-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/aspeed_soc.c')
| -rw-r--r-- | hw/arm/aspeed_soc.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 26e03486f9..aaf18d3e42 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -205,10 +205,9 @@ static void aspeed_soc_init(Object *obj) sizeof(s->spi[i]), typename); } + snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), - TYPE_ASPEED_SDMC); - qdev_prop_set_uint32(DEVICE(&s->sdmc), "silicon-rev", - sc->info->silicon_rev); + typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size", &error_abort); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), |