diff options
author | Peter Maydell | 2019-07-22 15:07:39 +0200 |
---|---|---|
committer | Peter Maydell | 2019-07-22 15:07:39 +0200 |
commit | bc8c2ecfd07ade1f6b47f6f48929487409e578ff (patch) | |
tree | e7f0c18f71581221e351c926465393f5d1f1278b /hw/arm/mcimx6ul-evk.c | |
parent | target/arm: Add missing break statement for Hypervisor Trap Exception (diff) | |
download | qemu-bc8c2ecfd07ade1f6b47f6f48929487409e578ff.tar.gz qemu-bc8c2ecfd07ade1f6b47f6f48929487409e578ff.tar.xz qemu-bc8c2ecfd07ade1f6b47f6f48929487409e578ff.zip |
hw/arm/fsl-imx6ul.c: Remove dead SMP-related code
The i.MX6UL always has a single Cortex-A7 CPU (we set FSL_IMX6UL_NUM_CPUS
to 1 in line with this). This means that all the code in fsl-imx6ul.c to
handle multiple CPUs is dead code, and Coverity is now complaining that
it is unreachable (CID 1403008, 1403011).
Remove the unreachable code and the only-executes-once loops,
and replace the single-entry cpu[] array in the FSLIMX6ULState
with a simple cpu member.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190712115030.26895-1-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/mcimx6ul-evk.c')
-rw-r--r-- | hw/arm/mcimx6ul-evk.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index bbffb11c2a..1f6f4aed97 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -71,7 +71,7 @@ static void mcimx6ul_evk_init(MachineState *machine) } if (!qtest_enabled()) { - arm_load_kernel(&s->soc.cpu[0], &boot_info); + arm_load_kernel(&s->soc.cpu, &boot_info); } } |