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| author | Fabian Aggeler | 2014-12-11 13:07:50 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-12-11 13:07:50 +0100 |
| commit | 137feaa9a1622620adf19c0b707883dd990738e2 (patch) | |
| tree | c5eacacf5f85cf7cb1772fc18e20f27d057b639f /hw/arm/pxa2xx.c | |
| parent | target-arm: add MVBAR support (diff) | |
| download | qemu-137feaa9a1622620adf19c0b707883dd990738e2.tar.gz qemu-137feaa9a1622620adf19c0b707883dd990738e2.tar.xz qemu-137feaa9a1622620adf19c0b707883dd990738e2.zip | |
target-arm: add SCTLR_EL3 and make SCTLR banked
Implements SCTLR_EL3 and uses secure/non-secure instance when
needed.
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1416242878-876-14-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/pxa2xx.c')
| -rw-r--r-- | hw/arm/pxa2xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 693dfec9f2..11d51afcf9 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -273,7 +273,7 @@ static void pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri, case 3: s->cpu->env.uncached_cpsr = ARM_CPU_MODE_SVC; s->cpu->env.daif = PSTATE_A | PSTATE_F | PSTATE_I; - s->cpu->env.cp15.c1_sys = 0; + s->cpu->env.cp15.sctlr_ns = 0; s->cpu->env.cp15.c1_coproc = 0; s->cpu->env.cp15.ttbr0_el1 = 0; s->cpu->env.cp15.c3 = 0; |