diff options
| author | Eric Auger | 2020-07-28 17:08:12 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-08-24 11:02:06 +0200 |
| commit | f0ec277cd46c0c7b078cc6bc90201999bb0dcd0b (patch) | |
| tree | 67f3a54b4bc8b0d40ae4acf85c071c11049eadb4 /hw/arm/smmuv3-internal.h | |
| parent | hw/arm/smmuv3: Get prepared for range invalidation (diff) | |
| download | qemu-f0ec277cd46c0c7b078cc6bc90201999bb0dcd0b.tar.gz qemu-f0ec277cd46c0c7b078cc6bc90201999bb0dcd0b.tar.xz qemu-f0ec277cd46c0c7b078cc6bc90201999bb0dcd0b.zip | |
hw/arm/smmuv3: Fix IIDR offset
The SMMU IIDR register is at 0x018 offset.
Fixes: 10a83cb9887 ("hw/arm/smmuv3: Skeleton")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200728150815.11446-9-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/smmuv3-internal.h')
| -rw-r--r-- | hw/arm/smmuv3-internal.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index 5babf72f7d..ef093eaff5 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -63,7 +63,7 @@ REG32(IDR5, 0x14) #define SMMU_IDR5_OAS 4 -REG32(IIDR, 0x1c) +REG32(IIDR, 0x18) REG32(CR0, 0x20) FIELD(CR0, SMMU_ENABLE, 0, 1) FIELD(CR0, EVENTQEN, 2, 1) |