diff options
| author | Eric Auger | 2020-07-28 17:08:15 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-08-24 11:02:06 +0200 |
| commit | de206dfd80412ed1cdfb70d43ad53c59a19361ab (patch) | |
| tree | 9701cb7a6c4ac5fbed439e55f455c4c3be68db9f /hw/arm/smmuv3.c | |
| parent | hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support (diff) | |
| download | qemu-de206dfd80412ed1cdfb70d43ad53c59a19361ab.tar.gz qemu-de206dfd80412ed1cdfb70d43ad53c59a19361ab.tar.xz qemu-de206dfd80412ed1cdfb70d43ad53c59a19361ab.zip | |
hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation
Expose the RIL bit so that the guest driver uses range
invalidation. Although RIL is a 3.2 features, We let
the AIDR advertise SMMUv3.1 support as v3.x implementation
is allowed to implement features from v3.(x+1).
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200728150815.11446-12-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/smmuv3.c')
| -rw-r--r-- | hw/arm/smmuv3.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index b262f0e4a7..0122700e72 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -254,6 +254,7 @@ static void smmuv3_init_regs(SMMUv3State *s) s->idr[1] = FIELD_DP32(s->idr[1], IDR1, EVENTQS, SMMU_EVENTQS); s->idr[1] = FIELD_DP32(s->idr[1], IDR1, CMDQS, SMMU_CMDQS); + s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1); s->idr[3] = FIELD_DP32(s->idr[3], IDR3, HAD, 1); /* 4K and 64K granule support */ |