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| author | Alistair Francis | 2016-10-04 14:28:07 +0200 |
|---|---|---|
| committer | Peter Maydell | 2016-10-04 14:28:07 +0200 |
| commit | 540a8f34b4f018570a0bbd86975d41dee0d9510c (patch) | |
| tree | 1ffd255db9162a2cf1c3c39fabe255ce1286b824 /hw/arm/stm32f205_soc.c | |
| parent | STM32F205: Connect the ADC devices (diff) | |
| download | qemu-540a8f34b4f018570a0bbd86975d41dee0d9510c.tar.gz qemu-540a8f34b4f018570a0bbd86975d41dee0d9510c.tar.xz qemu-540a8f34b4f018570a0bbd86975d41dee0d9510c.zip | |
STM32F205: Connect the SPI devices
Connect the SPI devices to the STM32F205 SoC.
Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: d05849120420f8db0d9aa053bd23134c33cd9180.1474742262.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/stm32f205_soc.c')
| -rw-r--r-- | hw/arm/stm32f205_soc.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 2feddc3d07..38425bda6c 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -36,10 +36,13 @@ static const uint32_t usart_addr[STM_NUM_USARTS] = { 0x40011000, 0x40004400, 0x40004800, 0x40004C00, 0x40005000, 0x40011400 }; static const uint32_t adc_addr[STM_NUM_ADCS] = { 0x40012000, 0x40012100, 0x40012200 }; +static const uint32_t spi_addr[STM_NUM_SPIS] = { 0x40013000, 0x40003800, + 0x40003C00 }; static const int timer_irq[STM_NUM_TIMERS] = {28, 29, 30, 50}; static const int usart_irq[STM_NUM_USARTS] = {37, 38, 39, 52, 53, 71}; #define ADC_IRQ 18 +static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51}; static void stm32f205_soc_initfn(Object *obj) { @@ -68,6 +71,12 @@ static void stm32f205_soc_initfn(Object *obj) TYPE_STM32F2XX_ADC); qdev_set_parent_bus(DEVICE(&s->adc[i]), sysbus_get_default()); } + + for (i = 0; i < STM_NUM_SPIS; i++) { + object_initialize(&s->spi[i], sizeof(s->spi[i]), + TYPE_STM32F2XX_SPI); + qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default()); + } } static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) @@ -167,6 +176,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->adc_irqs), i)); } + + /* SPI 1 and 2 */ + for (i = 0; i < STM_NUM_SPIS; i++) { + dev = DEVICE(&(s->spi[i])); + object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } + busdev = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, spi_addr[i]); + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, spi_irq[i])); + } } static Property stm32f205_soc_properties[] = { |