diff options
author | Eric Auger | 2018-05-04 19:05:51 +0200 |
---|---|---|
committer | Peter Maydell | 2018-05-04 19:49:18 +0200 |
commit | 6a736033d343e0e5774849fa0eef88f2582c364a (patch) | |
tree | 63ee937cc3e0e3a664692d4bbf64db37247ca726 /hw/arm/trace-events | |
parent | hw/arm/smmuv3: Skeleton (diff) | |
download | qemu-6a736033d343e0e5774849fa0eef88f2582c364a.tar.gz qemu-6a736033d343e0e5774849fa0eef88f2582c364a.tar.xz qemu-6a736033d343e0e5774849fa0eef88f2582c364a.zip |
hw/arm/smmuv3: Wired IRQ and GERROR helpers
We introduce some helpers to handle wired IRQs and especially
GERROR interrupt. SMMU writes GERROR register on GERROR event
and SW acks GERROR interrupts by setting GERRORn.
The Wired interrupts are edge sensitive hence the pulse usage.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Prem Mallappa <prem.mallappa@broadcom.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1524665762-31355-6-git-send-email-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/trace-events')
-rw-r--r-- | hw/arm/trace-events | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 983ed4b68c..e192baf62d 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -15,3 +15,6 @@ smmu_get_pte(uint64_t baseaddr, int index, uint64_t pteaddr, uint64_t pte) "base #hw/arm/smmuv3.c smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" +smmuv3_trigger_irq(int irq) "irq=%d" +smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) "toggled=0x%x, new GERROR=0x%x" +smmuv3_write_gerrorn(uint32_t acked, uint32_t gerrorn) "acked=0x%x, new GERRORN=0x%x" |