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| author | Bin Meng | 2022-04-21 02:33:21 +0200 |
|---|---|---|
| committer | Alistair Francis | 2022-04-22 02:35:16 +0200 |
| commit | b6092544fcbe747c005db25c38d8081d281c79ad (patch) | |
| tree | 9eb946406e188919f3603c486117f35e9dfbf10c /hw/arm/virt.c | |
| parent | target/riscv: cpu: Add a config option for native debug (diff) | |
| download | qemu-b6092544fcbe747c005db25c38d8081d281c79ad.tar.gz qemu-b6092544fcbe747c005db25c38d8081d281c79ad.tar.xz qemu-b6092544fcbe747c005db25c38d8081d281c79ad.zip | |
target/riscv: csr: Hook debug CSR read/write
This adds debug CSR read/write support to the RISC-V CSR RW table.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220421003324.1134983-4-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/arm/virt.c')
0 files changed, 0 insertions, 0 deletions