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authorPeter Maydell2021-03-14 14:18:49 +0100
committerPeter Maydell2021-03-14 14:18:49 +0100
commit6f8a81fc296535f73c48cf9563862e088cc71c57 (patch)
tree1132db2423ed7ce1fcbec9ce6c32dcf07ead6dc7 /hw/arm/xlnx-versal.c
parentMerge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' ... (diff)
parenthw/display/pxa2xx: Inline template header (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210314' into staging
target-arm queue: * versal: Support XRAMs and XRAM controller * smmu: Various minor bug fixes * SVE emulation: fix bugs handling odd vector lengths * allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC register value * tests/acceptance: fix orangepi-pc acceptance tests * hw/timer/sse-timer: Propagate eventual error in sse_timer_realize() * hw/arm/virt: KVM: The IPA lower bound is 32 * npcm7xx: support MFT module * pl110, pxa2xx_lcd: tidy up template headers # gpg: Signature made Sun 14 Mar 2021 13:17:43 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210314: (39 commits) hw/display/pxa2xx: Inline template header hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header hw/display/pxa2xx: Apply brace-related coding style fixes to template header hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h hw/display/pxa2xx_lcd: Remove dest_width state field hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces hw/display/pl110: Remove use of BITS from pl110_template.h hw/display/pl110: Pull included-once parts of template header into pl110.c hw/display/pl110: Remove dead code for non-32-bpp surfaces tests/qtest: Test PWM fan RPM using MFT in PWM test hw/arm: Connect PWM fans in NPCM7XX boards hw/arm: Add MFT device to NPCM7xx Soc hw/misc: Add NPCM7XX MFT Module hw/misc: Add GPIOs for duty in NPCM7xx PWM hw/arm/virt: KVM: The IPA lower bound is 32 accel: kvm: Fix kvm_type invocation hw/timer/sse-timer: Propagate eventual error in sse_timer_realize() tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, cubieboard tests tests/acceptance: update sunxi kernel from armbian to 5.10.16 tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_bionic_20_08 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xlnx-versal.c')
-rw-r--r--hw/arm/xlnx-versal.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 628e77ef66..79609692e4 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/log.h"
#include "qemu/module.h"
@@ -278,6 +279,40 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)
sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]);
}
+static void versal_create_xrams(Versal *s, qemu_irq *pic)
+{
+ int nr_xrams = ARRAY_SIZE(s->lpd.xram.ctrl);
+ DeviceState *orgate;
+ int i;
+
+ /* XRAM IRQs get ORed into a single line. */
+ object_initialize_child(OBJECT(s), "xram-irq-orgate",
+ &s->lpd.xram.irq_orgate, TYPE_OR_IRQ);
+ orgate = DEVICE(&s->lpd.xram.irq_orgate);
+ object_property_set_int(OBJECT(orgate),
+ "num-lines", nr_xrams, &error_fatal);
+ qdev_realize(orgate, NULL, &error_fatal);
+ qdev_connect_gpio_out(orgate, 0, pic[VERSAL_XRAM_IRQ_0]);
+
+ for (i = 0; i < ARRAY_SIZE(s->lpd.xram.ctrl); i++) {
+ SysBusDevice *sbd;
+ MemoryRegion *mr;
+
+ object_initialize_child(OBJECT(s), "xram[*]", &s->lpd.xram.ctrl[i],
+ TYPE_XLNX_XRAM_CTRL);
+ sbd = SYS_BUS_DEVICE(&s->lpd.xram.ctrl[i]);
+ sysbus_realize(sbd, &error_fatal);
+
+ mr = sysbus_mmio_get_region(sbd, 0);
+ memory_region_add_subregion(&s->mr_ps,
+ MM_XRAMC + i * MM_XRAMC_SIZE, mr);
+ mr = sysbus_mmio_get_region(sbd, 1);
+ memory_region_add_subregion(&s->mr_ps, MM_XRAM + i * MiB, mr);
+
+ sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(orgate, i));
+ }
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -363,6 +398,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_admas(s, pic);
versal_create_sds(s, pic);
versal_create_rtc(s, pic);
+ versal_create_xrams(s, pic);
versal_map_ddr(s);
versal_unimp(s);