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author | Eduardo Habkost | 2020-09-22 00:10:40 +0200 |
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committer | Eduardo Habkost | 2020-09-22 22:48:29 +0200 |
commit | f93a83c00485d00db133a5077864275a735f0fd2 (patch) | |
tree | c868375076f6e18da8247e9b8c1e9e4a87f94ac4 /hw/arm/xlnx-zcu102.c | |
parent | cpu/core: Register core-id and nr-threads as class properties (diff) | |
download | qemu-f93a83c00485d00db133a5077864275a735f0fd2.tar.gz qemu-f93a83c00485d00db133a5077864275a735f0fd2.tar.xz qemu-f93a83c00485d00db133a5077864275a735f0fd2.zip |
xlnx-zcu102: Register properties as class properties
Class properties make QOM introspection simpler and easier, as
they don't require an object to be instantiated.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20200921221045.699690-20-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/arm/xlnx-zcu102.c')
-rw-r--r-- | hw/arm/xlnx-zcu102.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 066571a972..ad7fff9697 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -206,20 +206,8 @@ static void xlnx_zcu102_machine_instance_init(Object *obj) /* Default to secure mode being disabled */ s->secure = false; - object_property_add_bool(obj, "secure", zcu102_get_secure, - zcu102_set_secure); - object_property_set_description(obj, "secure", - "Set on/off to enable/disable the ARM " - "Security Extensions (TrustZone)"); - /* Default to virt (EL2) being disabled */ s->virt = false; - object_property_add_bool(obj, "virtualization", zcu102_get_virt, - zcu102_set_virt); - object_property_set_description(obj, "virtualization", - "Set on/off to enable/disable emulating a " - "guest CPU which implements the ARM " - "Virtualization Extensions"); } static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) @@ -235,6 +223,19 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; mc->default_ram_id = "ddr-ram"; + + object_class_property_add_bool(oc, "secure", zcu102_get_secure, + zcu102_set_secure); + object_class_property_set_description(oc, "secure", + "Set on/off to enable/disable the ARM " + "Security Extensions (TrustZone)"); + + object_class_property_add_bool(oc, "virtualization", zcu102_get_virt, + zcu102_set_virt); + object_class_property_set_description(oc, "virtualization", + "Set on/off to enable/disable emulating a " + "guest CPU which implements the ARM " + "Virtualization Extensions"); } static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { |