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| author | Peter Maydell | 2019-02-01 15:55:43 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-02-01 15:55:43 +0100 |
| commit | 0829d24e6646e23507917859eea96f163eb62637 (patch) | |
| tree | daa5dff72dc6d5a80cb643161bb4aca9b774e4cf /hw/arm | |
| parent | hw/arm/armsse: Add CPU_IDENTITY block to SSE-200 (diff) | |
| download | qemu-0829d24e6646e23507917859eea96f163eb62637.tar.gz qemu-0829d24e6646e23507917859eea96f163eb62637.tar.xz qemu-0829d24e6646e23507917859eea96f163eb62637.zip | |
hw/arm/armsse: Add SSE-200 model
Add a model of the SSE-200, now we have put in all
the code that lets us make it different from the IoTKit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-22-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/armsse.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index eb691faf72..5d53071a5a 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -50,6 +50,18 @@ static const ARMSSEInfo armsse_variants[] = { .has_cpusecctrl = false, .has_cpuid = false, }, + { + .name = TYPE_SSE200, + .sram_banks = 4, + .num_cpus = 2, + .sys_version = 0x22041743, + .sys_config_format = SSE200Format, + .has_mhus = true, + .has_ppus = true, + .has_cachectrl = true, + .has_cpusecctrl = true, + .has_cpuid = true, + }, }; static uint32_t armsse_sys_config_value(ARMSSE *s, const ARMSSEInfo *info) |