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| author | Philippe Mathieu-Daudé | 2020-11-07 20:34:00 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-11-10 12:03:48 +0100 |
| commit | 2108e5092a67aaaa710845159cab9df514e28716 (patch) | |
| tree | 6190ad742c97cd1cae91a5fe89d3960c0a7c8f2b /hw/arm | |
| parent | hw/arm/armsse: Correct expansion MPC interrupt lines (diff) | |
| download | qemu-2108e5092a67aaaa710845159cab9df514e28716.tar.gz qemu-2108e5092a67aaaa710845159cab9df514e28716.tar.xz qemu-2108e5092a67aaaa710845159cab9df514e28716.zip | |
hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ
The system configuration controller (SYSCFG) doesn't have
any output IRQ (and the INTC input #71 belongs to the UART6).
Remove the invalid code.
Fixes: db635521a02 ("stm32f205: Add the stm32f205 SoC")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201107193403.436146-3-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/stm32f205_soc.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index a4f3344db2..9cd41bf56d 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -117,7 +117,6 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) } busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0x40013800); - sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71)); /* Attach UART (uses USART registers) and USART controllers */ for (i = 0; i < STM_NUM_USARTS; i++) { |