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author | Peter Maydell | 2020-12-10 15:26:35 +0100 |
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committer | Peter Maydell | 2020-12-10 15:26:35 +0100 |
commit | 379e9eaed497a2e09b5985e1e15967d7bfea8296 (patch) | |
tree | 45cb9eff91601d0de760d40097829b0b565f934f /hw/arm | |
parent | Merge remote-tracking branch 'remotes/kraxel/tags/microvm-20201210-pull-reque... (diff) | |
parent | aspeed: g220a-bmc: Add an FRU (diff) | |
download | qemu-379e9eaed497a2e09b5985e1e15967d7bfea8296.tar.gz qemu-379e9eaed497a2e09b5985e1e15967d7bfea8296.tar.xz qemu-379e9eaed497a2e09b5985e1e15967d7bfea8296.zip |
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20201210' into staging
Aspeed patches :
* New device model for EMC1413/EMC1414 temperature sensors (I2C)
* New g220a-bmc Aspeed machine
* couple of Aspeed cleanups
# gpg: Signature made Thu 10 Dec 2020 11:58:10 GMT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20201210:
aspeed: g220a-bmc: Add an FRU
aspeed/smc: Add support for address lane disablement
ast2600: SRAM is 89KB
aspeed: Add support for the g220a-bmc board
hw/misc: add an EMC141{3,4} device model
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r-- | hw/arm/Kconfig | 1 | ||||
-rw-r--r-- | hw/arm/aspeed.c | 72 | ||||
-rw-r--r-- | hw/arm/aspeed_ast2600.c | 2 |
3 files changed, 74 insertions, 1 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index e69a9009cf..eb8a8844cf 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -407,6 +407,7 @@ config ASPEED_SOC select SSI_M25P80 select TMP105 select TMP421 + select EMC141X select UNIMP select LED diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 0ef3f6b412..bfe2051cfe 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -121,6 +121,20 @@ struct AspeedMachineState { SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) +#define G220A_BMC_HW_STRAP1 ( \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_RESERVED28 | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_2ND_BOOT_WDT | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ + SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \ + SCU_AST2500_HW_STRAP_RESERVED1) + /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 @@ -579,6 +593,42 @@ static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc) /* Bus 11: TODO ucd90160@64 */ } +static void g220a_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = &bmc->soc; + DeviceState *dev; + + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), + "emc1413", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12), + "emc1413", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13), + "emc1413", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + + static uint8_t eeprom_buf[2 * 1024] = { + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe, + 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65, + 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32, + 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42, + 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45, + 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, + }; + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57, + eeprom_buf); +} + static bool aspeed_get_mmio_exec(Object *obj, Error **errp) { return ASPEED_MACHINE(obj)->mmio_exec; @@ -818,6 +868,24 @@ static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) aspeed_soc_num_cpus(amc->soc_name); }; +static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Bytedance G220A BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = G220A_BMC_HW_STRAP1; + amc->fmc_model = "n25q512a"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC1_ON | ASPEED_MAC2_ON; + amc->i2c_init = g220a_bmc_i2c_init; + mc->default_ram_size = 1024 * MiB; + mc->default_cpus = mc->min_cpus = mc->max_cpus = + aspeed_soc_num_cpus(amc->soc_name); +}; + static const TypeInfo aspeed_machine_types[] = { { .name = MACHINE_TYPE_NAME("palmetto-bmc"), @@ -856,6 +924,10 @@ static const TypeInfo aspeed_machine_types[] = { .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_tacoma_class_init, }, { + .name = MACHINE_TYPE_NAME("g220a-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_g220a_class_init, + }, { .name = TYPE_ASPEED_MACHINE, .parent = TYPE_MACHINE, .instance_size = sizeof(AspeedMachineState), diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 1450bde7cf..12e4a16d37 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -481,7 +481,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) sc->name = "ast2600-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); sc->silicon_rev = AST2600_A1_SILICON_REV; - sc->sram_size = 0x10000; + sc->sram_size = 0x16400; sc->spis_num = 2; sc->ehcis_num = 2; sc->wdts_num = 4; |