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| author | Peter Maydell | 2021-02-19 15:46:09 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-03-08 18:20:03 +0100 |
| commit | 8b4b5c23f92df5ebc2c4aa55b01d4e1d9d06548e (patch) | |
| tree | cb07effb9d81bd5208e1b857e5622e06c38d166a /hw/arm | |
| parent | hw/arm/armsse: Add SSE-300 support (diff) | |
| download | qemu-8b4b5c23f92df5ebc2c4aa55b01d4e1d9d06548e.tar.gz qemu-8b4b5c23f92df5ebc2c4aa55b01d4e1d9d06548e.tar.xz qemu-8b4b5c23f92df5ebc2c4aa55b01d4e1d9d06548e.zip | |
hw/arm/mps2-tz: Make UART overflow IRQ board-specific
The AN547 puts the combined UART overflow IRQ at 48, not 47 like the
other images. Make this setting board-specific.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-37-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/mps2-tz.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 72da8cb1a1..85e80c4d72 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -111,6 +111,7 @@ struct MPS2TZMachineClass { uint32_t fpgaio_num_leds; /* Number of LEDs in FPGAIO LED0 register */ bool fpgaio_has_switches; /* Does FPGAIO have SWITCH register? */ int numirq; /* Number of external interrupts */ + int uart_overflow_irq; /* number of the combined UART overflow IRQ */ const RAMInfo *raminfo; const char *armsse_type; }; @@ -770,7 +771,7 @@ static void mps2tz_common_init(MachineState *machine) &error_fatal); qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal); qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0, - get_sse_irq_in(mms, 47)); + get_sse_irq_in(mms, mmc->uart_overflow_irq)); /* Most of the devices in the FPGA are behind Peripheral Protection * Controllers. The required order for initializing things is: @@ -1046,6 +1047,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data) mmc->fpgaio_num_leds = 2; mmc->fpgaio_has_switches = false; mmc->numirq = 92; + mmc->uart_overflow_irq = 47; mmc->raminfo = an505_raminfo; mmc->armsse_type = TYPE_IOTKIT; mps2tz_set_default_ram_info(mmc); @@ -1069,6 +1071,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data) mmc->fpgaio_num_leds = 2; mmc->fpgaio_has_switches = false; mmc->numirq = 92; + mmc->uart_overflow_irq = 47; mmc->raminfo = an505_raminfo; /* AN521 is the same as AN505 here */ mmc->armsse_type = TYPE_SSE200; mps2tz_set_default_ram_info(mmc); @@ -1092,6 +1095,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data) mmc->fpgaio_num_leds = 10; mmc->fpgaio_has_switches = true; mmc->numirq = 95; + mmc->uart_overflow_irq = 47; mmc->raminfo = an524_raminfo; mmc->armsse_type = TYPE_SSE200; mps2tz_set_default_ram_info(mmc); |