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author | Peter Maydell | 2021-02-03 13:55:44 +0100 |
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committer | Peter Maydell | 2021-02-03 13:55:44 +0100 |
commit | 99ae0cd90d3e41b424582cf74bcf32498ca81bb9 (patch) | |
tree | 6bb9bd3778c27d35c3e9c7f7c0458b7112502591 /hw/arm | |
parent | Merge remote-tracking branch 'remotes/ehabkost-gl/tags/machine-next-pull-requ... (diff) | |
parent | hw/arm: Display CPU type in machine description (diff) | |
download | qemu-99ae0cd90d3e41b424582cf74bcf32498ca81bb9.tar.gz qemu-99ae0cd90d3e41b424582cf74bcf32498ca81bb9.tar.xz qemu-99ae0cd90d3e41b424582cf74bcf32498ca81bb9.zip |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210203' into staging
target-arm queue:
* hw/intc/arm_gic: Allow to use QTest without crashing
* hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled
* hw/char/exynos4210_uart: Fix missing call to report ready for input
* hw/arm/smmuv3: Fix addr_mask for range-based invalidation
* hw/ssi/imx_spi: Fix various minor bugs
* hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register
* hw/arm: Add missing Kconfig dependencies
* hw/arm: Display CPU type in machine description
# gpg: Signature made Wed 03 Feb 2021 10:16:36 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210203: (21 commits)
hw/arm: Display CPU type in machine description
hw/net/can: ZynqMP CAN device requires PTIMER
hw/arm/xlnx-versal: Versal SoC requires ZynqMP peripherals
hw/arm/xlnx-versal: Versal SoC requires ZDMA
hw/arm/exynos4210: Add missing dependency on OR_IRQ
hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register
hw/ssi: imx_spi: Correct tx and rx fifo endianness
hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic
hw/ssi: imx_spi: Round up the burst length to be multiple of 8
hw/ssi: imx_spi: Disable chip selects when controller is disabled
hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled
hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled
hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value
hw/ssi: imx_spi: Remove pointless variable initialization
hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset()
hw/ssi: imx_spi: Use a macro for number of chip selects supported
hw/arm/smmuv3: Fix addr_mask for range-based invalidation
hw/char/exynos4210_uart: Fix missing call to report ready for input
hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r-- | hw/arm/Kconfig | 5 | ||||
-rw-r--r-- | hw/arm/digic_boards.c | 2 | ||||
-rw-r--r-- | hw/arm/microbit.c | 2 | ||||
-rw-r--r-- | hw/arm/netduino2.c | 2 | ||||
-rw-r--r-- | hw/arm/netduinoplus2.c | 2 | ||||
-rw-r--r-- | hw/arm/orangepi.c | 2 | ||||
-rw-r--r-- | hw/arm/smmuv3.c | 4 | ||||
-rw-r--r-- | hw/arm/stellaris.c | 4 |
8 files changed, 15 insertions, 8 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 13cc42dcc8..be017b997a 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -52,6 +52,7 @@ config EXYNOS4 select PTIMER select SDHCI select USB_EHCI_SYSBUS + select OR_IRQ config HIGHBANK bool @@ -336,6 +337,7 @@ config STM32F205_SOC config STM32F405_SOC bool select ARM_V7M + select OR_IRQ select STM32F4XX_SYSCFG select STM32F4XX_EXTI @@ -352,6 +354,7 @@ config XLNX_ZYNQMP_ARM select XILINX_AXI select XILINX_SPIPS select XLNX_ZYNQMP + select XLNX_ZDMA config XLNX_VERSAL bool @@ -360,6 +363,8 @@ config XLNX_VERSAL select CADENCE select VIRTIO_MMIO select UNIMP + select XLNX_ZDMA + select XLNX_ZYNQMP config NPCM7XX bool diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index be12873673..6cdc1d83fc 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -142,7 +142,7 @@ static void canon_a1100_init(MachineState *machine) static void canon_a1100_machine_init(MachineClass *mc) { - mc->desc = "Canon PowerShot A1100 IS"; + mc->desc = "Canon PowerShot A1100 IS (ARM946)"; mc->init = &canon_a1100_init; mc->ignore_memory_transaction_failures = true; mc->default_ram_size = 64 * MiB; diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index 0947491cb9..e9494334ce 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -64,7 +64,7 @@ static void microbit_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); - mc->desc = "BBC micro:bit"; + mc->desc = "BBC micro:bit (Cortex-M0)"; mc->init = microbit_init; mc->max_cpus = 1; } diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index 8f10334144..1733b71507 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -54,7 +54,7 @@ static void netduino2_init(MachineState *machine) static void netduino2_machine_init(MachineClass *mc) { - mc->desc = "Netduino 2 Machine"; + mc->desc = "Netduino 2 Machine (Cortex-M3)"; mc->init = netduino2_init; mc->ignore_memory_transaction_failures = true; } diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c index 68abd3ec69..d3ad7a2b67 100644 --- a/hw/arm/netduinoplus2.c +++ b/hw/arm/netduinoplus2.c @@ -55,7 +55,7 @@ static void netduinoplus2_init(MachineState *machine) static void netduinoplus2_machine_init(MachineClass *mc) { - mc->desc = "Netduino Plus 2 Machine"; + mc->desc = "Netduino Plus 2 Machine (Cortex-M4)"; mc->init = netduinoplus2_init; } diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index d6306dfdda..40cdb5c6d2 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -113,7 +113,7 @@ static void orangepi_init(MachineState *machine) static void orangepi_machine_init(MachineClass *mc) { - mc->desc = "Orange Pi PC"; + mc->desc = "Orange Pi PC (Cortex-A7)"; mc->init = orangepi_init; mc->block_default_type = IF_SD; mc->units_per_default_bus = 1; diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index bbca0e9f20..98b99d4fe8 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -801,7 +801,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, { SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu); IOMMUTLBEvent event; - uint8_t granule = tg; + uint8_t granule; if (!tg) { SMMUEventInfo event = {.inval_ste_allowed = true}; @@ -821,6 +821,8 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, return; } granule = tt->granule_sz; + } else { + granule = tg * 2 + 10; } event.type = IOMMU_NOTIFIER_UNMAP; diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index ad72c0959f..27292ec411 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1538,7 +1538,7 @@ static void lm3s811evb_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); - mc->desc = "Stellaris LM3S811EVB"; + mc->desc = "Stellaris LM3S811EVB (Cortex-M3)"; mc->init = lm3s811evb_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); @@ -1554,7 +1554,7 @@ static void lm3s6965evb_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); - mc->desc = "Stellaris LM3S6965EVB"; + mc->desc = "Stellaris LM3S6965EVB (Cortex-M3)"; mc->init = lm3s6965evb_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); |