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authorIgor Mammedov2020-02-19 17:09:10 +0100
committerPatchew Importer2020-02-19 17:49:57 +0100
commite9201598f42803253e67574022f13bb9b2e82dcb (patch)
tree8d0f4a6bd371e833e50a07ec6d21d7700ab2da6f /hw/arm
parentarm/xilinx_zynq: use memdev for RAM (diff)
downloadqemu-e9201598f42803253e67574022f13bb9b2e82dcb.tar.gz
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arm/xlnx-versal-virt: use memdev for RAM
memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200219160953.13771-37-imammedo@redhat.com>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/xlnx-versal-virt.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 462493c467..c137ff4def 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -30,7 +30,6 @@ typedef struct VersalVirt {
MachineState parent_obj;
Versal soc;
- MemoryRegion mr_ddr;
void *fdt;
int fdt_size;
@@ -414,12 +413,9 @@ static void versal_virt_init(MachineState *machine)
psci_conduit = QEMU_PSCI_CONDUIT_SMC;
}
- memory_region_allocate_system_memory(&s->mr_ddr, NULL, "ddr",
- machine->ram_size);
-
sysbus_init_child_obj(OBJECT(machine), "xlnx-ve", &s->soc,
sizeof(s->soc), TYPE_XLNX_VERSAL);
- object_property_set_link(OBJECT(&s->soc), OBJECT(&s->mr_ddr),
+ object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
"ddr", &error_abort);
object_property_set_int(OBJECT(&s->soc), psci_conduit,
"psci-conduit", &error_abort);
@@ -473,6 +469,7 @@ static void versal_virt_machine_class_init(ObjectClass *oc, void *data)
mc->max_cpus = XLNX_VERSAL_NR_ACPUS;
mc->default_cpus = XLNX_VERSAL_NR_ACPUS;
mc->no_cdrom = true;
+ mc->default_ram_id = "ddr";
}
static const TypeInfo versal_virt_machine_init_typeinfo = {