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authorPeter Maydell2013-01-21 13:50:51 +0100
committerBlue Swirl2013-01-26 14:20:43 +0100
commitbf4229d3cb09be2efc0add569feba33834fc5d93 (patch)
tree58232e77fd5222835e61e2204920923df278f515 /hw/arm_sysctl.c
parentlink seccomp only with softmmu targets (diff)
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hw/arm_sysctl.c: Add missing 'break' statements
Add some break statements that were accidentally omitted from some cases of arm_sysctl_write(). The omission was harmless because in both cases the following case did an immediate break, but adding the breaks explicitly placates static analysers and avoids weird behaviour if the following register is ever implemented as something other than a no-op. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/arm_sysctl.c')
-rw-r--r--hw/arm_sysctl.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 755a5df2c9..da36f8a435 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -199,6 +199,7 @@ static void arm_sysctl_write(void *opaque, hwaddr offset,
switch (offset) {
case 0x08: /* LED */
s->leds = val;
+ break;
case 0x0c: /* OSC0 */
case 0x10: /* OSC1 */
case 0x14: /* OSC2 */
@@ -295,6 +296,7 @@ static void arm_sysctl_write(void *opaque, hwaddr offset,
/* On VExpress this register is unimplemented and will RAZ/WI */
break;
}
+ break;
case 0x54: /* CLCDSER */
case 0x64: /* DMAPSR0 */
case 0x68: /* DMAPSR1 */