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| author | Ard Biesheuvel | 2013-12-17 20:42:25 +0100 |
|---|---|---|
| committer | Peter Maydell | 2013-12-17 20:42:25 +0100 |
| commit | 9d935509fdb48e47cc46e81d2b9d466b18b546ba (patch) | |
| tree | 90d42d5f564146e21609e72ca8b9445356519fbe /hw/block/pflash_cfi01.c | |
| parent | qemu_opts_parse(): always check return value (diff) | |
| download | qemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.tar.gz qemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.tar.xz qemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.zip | |
target-arm: add support for v8 AES instructions
This adds support for the AESE/AESD/AESMC/AESIMC instructions that
are available on some v8 implementations of Aarch32.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 1386266078-6976-1-git-send-email-ard.biesheuvel@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/block/pflash_cfi01.c')
0 files changed, 0 insertions, 0 deletions