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| author | Klaus Jensen | 2021-01-13 10:19:44 +0100 |
|---|---|---|
| committer | Klaus Jensen | 2021-02-08 21:15:54 +0100 |
| commit | c2a3640de8e97bc0398976a7fc0fe9f6a088e777 (patch) | |
| tree | 542b26bf82e1d0c6c331dc415793cbb76a33fdc3 /hw/block | |
| parent | hw/block/nvme: move cmb logic to v1.4 (diff) | |
| download | qemu-c2a3640de8e97bc0398976a7fc0fe9f6a088e777.tar.gz qemu-c2a3640de8e97bc0398976a7fc0fe9f6a088e777.tar.xz qemu-c2a3640de8e97bc0398976a7fc0fe9f6a088e777.zip | |
hw/block/nvme: bump to v1.4
With the new CMB logic in place, bump the implemented specification
version to v1.4 by default.
This requires adding the setting the CNTRLTYPE field and modifying the
VWC field since 0x00 is no longer a valid value for bits 2:1.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Diffstat (limited to 'hw/block')
| -rw-r--r-- | hw/block/nvme.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 1e13d25b08..c4c968f595 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -108,7 +108,7 @@ #define NVME_MAX_IOQPAIRS 0xffff #define NVME_DB_SIZE 4 -#define NVME_SPEC_VER 0x00010300 +#define NVME_SPEC_VER 0x00010400 #define NVME_CMB_BIR 2 #define NVME_PMR_BIR 4 #define NVME_TEMPERATURE 0x143 @@ -4450,6 +4450,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) id->mdts = n->params.mdts; id->ver = cpu_to_le32(NVME_SPEC_VER); id->oacs = cpu_to_le16(0); + id->cntrltype = 0x1; /* * Because the controller always completes the Abort command immediately, @@ -4478,7 +4479,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) NVME_ONCS_FEATURES | NVME_ONCS_DSM | NVME_ONCS_COMPARE); - id->vwc = 0x1; + id->vwc = (0x2 << 1) | 0x1; id->sgls = cpu_to_le32(NVME_CTRL_SGLS_SUPPORT_NO_ALIGN | NVME_CTRL_SGLS_BITBUCKET); |