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| author | Philippe Mathieu-Daudé | 2018-07-09 15:51:34 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-07-09 15:51:34 +0200 |
| commit | 7abf56eed13a2338b8d3eda60e0d3c4e490a663f (patch) | |
| tree | e3e31b9bc77eb665ed6854b6a01b42b97233f853 /hw/core/bus.c | |
| parent | target/arm: Fix do_predset for large VL (diff) | |
| download | qemu-7abf56eed13a2338b8d3eda60e0d3c4e490a663f.tar.gz qemu-7abf56eed13a2338b8d3eda60e0d3c4e490a663f.tar.xz qemu-7abf56eed13a2338b8d3eda60e0d3c4e490a663f.zip | |
hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'
DeviceClass::reset models a "cold power-on" reset which can
also be used to powercycle a device; but there is no "hot reset"
(a.k.a. soft-reset) method available.
The OMAP MMC Power-Up Control bit is not designed to powercycle
a card, but to disable it without powering it off (pseudo-reset):
Multimedia Card (MMC/SD/SDIO) Interface [SPRU765A]
MMC_CON[11] Power-Up Control (POW)
This bit must be set to 1 before any valid transaction to either
MMC/SD or SPI memory cards.
When 1, the card is considered powered-up and the controller core
is enabled.
When 0, the card is considered powered-down (system dependent),
and the controller core logic is in pseudo-reset state. This is,
the MMC_STAT flags and the FIFO pointers are reset, any access to
MMC_DATA[DATA] has no effect, a write into the MMC.CMD register
is ignored, and a setting of MMC_SPI[STR] to 1 is ignored.
By splitting the 'pseudo-reset' code out of the 'power-on' reset
function, this patch fixes a latent bug in omap_mmc_write(MMC_CON)i
recently exposed by ecd219f7abb.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180706162155.8432-2-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/core/bus.c')
0 files changed, 0 insertions, 0 deletions