diff options
| author | Xuzhou Cheng | 2021-03-03 14:52:52 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-03-10 14:54:51 +0100 |
| commit | 668351a54883b6283e7ae94daf4d4eca1a071158 (patch) | |
| tree | d44541fb944bcb9d809bf9df774a141072f88dd2 /hw/core | |
| parent | hw/arm: xlnx-zynqmp: Clean up coding convention issues (diff) | |
| download | qemu-668351a54883b6283e7ae94daf4d4eca1a071158.tar.gz qemu-668351a54883b6283e7ae94daf4d4eca1a071158.tar.xz qemu-668351a54883b6283e7ae94daf4d4eca1a071158.zip | |
hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI
Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream
link of GQSPI to CSU DMA.
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/core')
0 files changed, 0 insertions, 0 deletions