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author | Dong Jia Shi | 2017-02-21 10:09:04 +0100 |
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committer | Cornelia Huck | 2017-02-24 10:15:18 +0100 |
commit | 9f94f84ce7df633142953806cc4c102765cabc0e (patch) | |
tree | dc24fbae809cb99dfe30e0b2d92fc42506f751e1 /hw/core | |
parent | s390x/arch_dump: pass cpuid into notes sections (diff) | |
download | qemu-9f94f84ce7df633142953806cc4c102765cabc0e.tar.gz qemu-9f94f84ce7df633142953806cc4c102765cabc0e.tar.xz qemu-9f94f84ce7df633142953806cc4c102765cabc0e.zip |
s390x/css: handle format-0 TIC CCW correctly
For TIC CCW, bit positions 8-32 of the format-1 CCW must contain zeros;
otherwise, a program-check condition is generated. For format-0 TIC CCWs,
bits 32-63 are ignored.
To convert TIC from format-0 CCW to format-1 CCW correctly, let's clear
bits 8-32 to guarantee compatibility.
Reviewed-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
Signed-off-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Diffstat (limited to 'hw/core')
0 files changed, 0 insertions, 0 deletions